Pilot-Line Semiconductor Process Engineer

National University of Singapore; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

The National University of Singapore is seeking a driven engineer to spearhead pilot-line development for wafer bonding and MOCVD epitaxy within the ETP - Administration at Kent Ridge Campus. You will own end-to-end process architecture, develop robust recipes, and drive yield, traceability, and industry-ready transfer documentation.

You will lead a multidisciplinary team in a fast-paced environment, coordinating with external foundries and suppliers to ensure scalable, industry-grade samples

Qualifications

• Proven experience in semiconductor process development, integration, or pilot-line scale-up.
• Hands-on expertise in wafer bonding, epitaxial growth (111-V and GaN), and supporting unit processes such as CMP, thermal processing, and metallization readiness.
• Experience defining end-to-end process flows and transitioning technologies from lab or prototype stage to pilot production.
• Strong background in yield engineering, SPC, process control, and root-cause analysis.
• Experience selecting, qualifying, and sustaining semiconductor process equipment and metrology tools.
• Experience producing comprehensive process documentation and transfer packages suitable for industry-grade sampling.
• Prior experience leading or mentoring multi-disciplinary engineering teams.

Responsibilities

• Define the pilot-line process architecture & roadmap for the targeted platform.
• Develop, optimise, and lock process recipes for scale across modules (wafer bonding, epitaxy, CMP, thermal steps).
• Lead hands-on process development and optimisation to achieve high yield and repeatability.
• Drive yield ramp plans and sustainment with CTQ parameters and SPC monitors.
• Select and qualify toolsets; plan preventive maintenance and uptime.
• Coordinate with external foundries, epi/material suppliers, and supply-chain teams.
• Produce the transfer package: flows, BOMs, specs, recipes, control plans, and traceability.

Skills

Semiconductor process development

Wafer bonding

Epitaxial growth GaN/111-V

SPC/process control

Root-cause analysis

Documentation/transfer packages

Team leadership

Tools

Metrology tools

Equipment qualification

Job description

The National University of Singapore is seeking a driven engineer to spearhead pilot-line development for wafer bonding and MOCVD epitaxy within the ETP - Administration at Kent Ridge Campus. You will own end-to-end process architecture, develop robust recipes, and drive yield, traceability, and industry-ready transfer documentation.

You will lead a multidisciplinary team in a fast-paced environment, coordinating with external foundries and suppliers to ensure scalable, industry-grade samples