IC ESD Device Design Intern: Hands-on Semiconductors

GlobalFoundries inc.; Singapore; On-site; SGD 20,000 - 29,000; Full time

Job summary

GlobalFoundries Singapore offers an internship focused on learning about electrostatic discharge (ESD) protection devices and their development through hands-on assignments. The intern will support ESD and I/O device design guidance for IC product design teams to ensure effective protection strategies.

Highlights include learning through mentoring, conducting device experiments, and performing TCAD simulations across 180nm to 28nm CMOS/BCD technologies, with emphasis on safety, growth, and

Qualifications

• Actively pursuing a Bachelor's degree in Electronic Engineering or related field during the time of internship.
• Must be in good academic standing.
• Ability to work at least 40 hours per week during the internship.
• Prior related internship or co-op experience (preferred).
• Demonstrated leadership experience in the workplace, school projects, competitions, etc.
• Project management skills and ability to navigate ambiguity; interest in AI tools.

Responsibilities

• Conduct device design experiments with mentor guidance to learn semiconductor concepts.
• Assist with ESD device design for high-voltage applications (12-85V and 100/200V) across CMOS/BCD tech.
• Perform TCAD simulations for ESD devices after training.
• Support customer ESD inquiries with technical data, analysis, and reports.
• Assist mentor in developing latch-up prevention rules via technical reports.

Skills

Leadership

Project management

AI tools interest

Education

Pursuing Bachelor's in Electronic Engineering

Job description

GlobalFoundries Singapore offers an internship focused on learning about electrostatic discharge (ESD) protection devices and their development through hands-on assignments. The intern will support ESD and I/O device design guidance for IC product design teams to ensure effective protection strategies.

Highlights include learning through mentoring, conducting device experiments, and performing TCAD simulations across 180nm to 28nm CMOS/BCD technologies, with emphasis on safety, growth, and