Digital SOC Validation Engineer

Qualcomm; Singapore; On-site; SGD 70,000 - 100,000; Full time

Job summary

Qualcomm Global Trading Pte. Ltd. is seeking an engineer to validate Digital SOC on ATE/SLT/Bench and drive test solutions through planning to execution in a fast-paced environment.

The role requires experience in Digital SOC development from planning to High Volume Manufacturing, with focus on ATE/SLT test coverage and data analytics, plus cross-functional collaboration across SW, System, and Design teams to optimize power and performance for high-volume silicon.

Qualifications

• Experience in Digital SOC development from planning, silicon validation to High Volume Manufacturing.
• Experience in ATE/SLT test coverage, test HW development, data analytics/statistics, product reliability qualification (ESD/LU, HTOL and Package Qual).
• ATE System correlation for power and performance, project updates to upper management and cross functional teams, stakeholder management, and risk management.

Responsibilities

• Collaborate with SOC Design, SW/System, and Chipset PE/PM/PdM to validate Digital SOC on ATE and SLT.
• Develop and implement HVM Test Solutions with Test Engineering, SLT and Bench.
• Work with SW, System, Design, Process and Customer Engineering on power and performance tests for High Volume Manufacturing.

Skills

Digital SOC development

Data analytics

Stakeholder management

Cross-functional collaboration

Education

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Tools

ATE/SLT hardware

Test hardware development

Job description

Qualcomm Global Trading Pte. Ltd. is seeking an engineer to validate Digital SOC on ATE/SLT/Bench and drive test solutions through planning to execution in a fast-paced environment.

The role requires experience in Digital SOC development from planning to High Volume Manufacturing, with focus on ATE/SLT test coverage and data analytics, plus cross-functional collaboration across SW, System, and Design teams to optimize power and performance for high-volume silicon.