Design Verification Engineer

Realtek Singapore Private Limited; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

Realtek Singapore Private Limited is seeking an experienced ASIC/SoC verification engineer to join our high‑speed digital design team. You will develop test plans, verification environments, and directed tests to ensure functional compliance of complex IPs.

You will collaborate with digital design teams, debug testcases, and deliver robust designs in a fast moving environment requiring strong communication and documentation skills.

Qualifications

• 6+ years of SOC/IP verification experience required.
• Strong verbal and written communication and documentation skills.
• Experience with SystemVerilog/UVM and Python is preferred.

Responsibilities

• Develop detailed module and SoC level test plans based on design specs.
• Develop ASIC verification environments including stimulus, checkers, assertions, monitors and scoreboards.
• Develop directed and constrained-random verification tests and simulate using EDA tools to verify functional spec.
• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all features.
• Collaborate with digital design team to debug functional test cases and deliver functionally correct designs.
• Demonstrate ability to deliver results in a fast-moving, dynamic environment.

Skills

SOC/IP verification

SystemVerilog/UVM

Python

OO language

Education

Bachelor/Master in Electronics/Electrical Engineering

Job description

JOB DESCRIPTION

• Develop detailed module level and SoC level test plans for all the functional features, based on the design spec.




• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.




• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working.




• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.




• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs.




• The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.

JOB REQUIREMENTS

• Bachelor/Masters in Electronics/Electrical Engineering.




• Level of Expertise: At least 6+ year of SOC/IP verification skills.




• Strong communication, analytical and documentation skills and ability to interface with other groups.




• Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products.




• Strong hardware functional verification language and Object-oriental language development skill.




• Preferred with strong knowledge in System Verilog, UVM, Python(TCL/Perl a plus)




• Familiar with ASIC verification methodology, tools, and development flow.




• Prior experience related to Automotive SoCs, Ethernet/Switch based IPs, High Speed IOs , Memory controllers (like DDR,PSRAM,Flash etc), Video (MIPI/CSI/DSI/HDMI/DP etc) or similar is an added plus.




• Able to handle tasks independent, estimate efforts and deliver results on time.




• Actively participate in resolving issues related to verification tasks in the project.




• Contribute to the overall improvement of verification at IP and SoC levels.