CPU Design, Senior/Staff Engineer

PERSOL Singapore

Singapore

On-site

SGD 120,000 - 180,000

Full time

5 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

PERSOL Singapore is seeking a CPU Design Senior/Staff Engineer to lead power delivery networks, signal integrity, and electromigration analyses for application processors. The role emphasizes PDN/EM/IR understanding and collaboration with cross-functional teams.

You will review feedback, propose improvements, and support the SoC MCU subsystem from feasibility through post-silicon debugging, ensuring robust power integrity across designs.

Qualifications

  • Bachelor's or Master's degree in Electrical/Computer Engineering.
  • Relevant industry experience is preferred.
  • Experience with high-speed CPU ARM Core Subsystems is a plus.
  • Cross-site collaboration experience is a plus.

Responsibilities

  • Provide feedback to stakeholders to resolve EM/IR issues.
  • Support SoC in MCU subsystem from feasibility to post-silicon debug.
  • Analyze PDNs, SI, and EM for power delivery networks and application processors.
  • Contribute improvements based on feedback to stakeholders to solve EM/IR.
  • Work on EM/IR analysis and verification for power integrity across designs.

Skills

Power integrity
Signal integrity
Electromigration (EM) analysis
Code-sign bump planning

Education

Bachelor's/Master's in Electrical/Computer Engineering

Tools

Voltus
Apache RedHawk

Job description

CPU Design, Senior/Staff Engineer
Job Description

Expertise in power delivery networks (PDNs), signal integrity, and electromigration (EM) analysis, Codesign Bump planning

Experience in Power & Signal Integrity (IR, EM) analysis on application processors

Understanding of power integrity concepts, methodologies

Provide feedback and improvement suggestions to stakeholders to solve EM/IR

Support SoC in MCU Subsystem from Technical Feasibility Evaluation phase to post-Silicon debug phase

Job Requirements
  • Bachelor/Master's Degree in Electrical/Computer Engineering
  • With relevant years of experience in similar industry preferred
  • Experience handling challenges related with High-Speed CPU ARM Core Subsystem is a PLUS
  • Strong experience with Voltus or Apache Redhawk
  • Cross-site working experience is a PLUS

PERSOL Singapore Pte Ltd - UEN No. 200007268E - EA License No. 01C4394 -EA Registration No. R23117785 (Lok Ding Hann)

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

CPU Design, Senior/Staff Engineer
CPU Design, Senior/Staff Engineer

PERSOL • Singapore

On-site
SGD 120,000 - 170,000
CPU Design, Technical Manager
CPU Design, Technical Manager

PERSOL • Singapore

On-site
SGD 120,000 - 180,000
CPU Design, Technical Manager
CPU Design, Technical Manager

PERSOL Singapore • Singapore

On-site
SGD 120,000 - 180,000
Senior CPU Design Engineer: Power & SI Leader
Senior CPU Design Engineer: Power & SI Leader

PERSOL • Singapore

On-site
SGD 120,000 - 170,000
Senior CPU Design Engineer: Power Integrity & SI Lead
Senior CPU Design Engineer: Power Integrity & SI Lead

PERSOL Singapore • Singapore

On-site
SGD 120,000 - 180,000
Senior CPU Design & Power Integrity Manager
Senior CPU Design & Power Integrity Manager

PERSOL • Singapore

On-site
SGD 120,000 - 180,000
Senior CPU Power & Signal Integrity Lead
Senior CPU Power & Signal Integrity Lead

PERSOL Singapore • Singapore

On-site
SGD 120,000 - 180,000
[2027 Campus Hire] CPU Design Implementation Engineer
[2027 Campus Hire] CPU Design Implementation Engineer

MediaTek • Singapore

On-site
SGD 42,000 - 66,000
SoC Digital Design Engineer, Multimedia Lab Singapore Regular
SoC Digital Design Engineer, Multimedia Lab Singapore Regular

ByteDance • Singapore

On-site
SGD 80,000 - 120,000
[MSL/SPD5] Senior/Staff Physical Design Engineer
[MSL/SPD5] Senior/Staff Physical Design Engineer

MediaTek • Singapore

On-site
SGD 120,000 - 180,000