Analog Mixed Signal Design Engineer

Astera Labs; Singapore; On-site; SGD 120,000 - 170,000; Full time

Job summary

Astera Labs is seeking an Analog/Mixed-Signal IC Design Engineer to join a key team that designs advanced CMOS products for AI connectivity. You will design and verify PLLs, DLLs, ADCs, regulators, amplifiers, TX/RX, and CDRs to meet stringent performance targets while shaping analog and clocking blocks for high-speed connectivity applications.

Proficiency with industry tools such as Spectre and MATLAB is required, and experience with 20nm node or newer tapeouts is highly valued.

Qualifications

• Pursuing a Master’s or PhD in EE is preferred.
• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs.
• Solid biasing, band-gaps, reference circuits, opamps and comparators understanding.
• Proven track-record for analog circuit implementation and high-speed data transmission.
• Design and tapeout experience in advanced CMOS nodes (e.g. 20nm+).
• Strong transistor-level design, stability analysis and noise/jitter understanding.
• Knowledge of TIA design and optical transceivers is a plus.
• Familiarity with Python/Matlab/C for scripting and lab debugging.

Responsibilities

• Design and verify PLL, DLL, ADC, regulators, amplifiers, TX/RX and CDRs to meet targets.
• Develop analog and clocking blocks for connectivity applications.
• Use Spectre and MATLAB for simulation and verification.
• Collaborate with global teams across time zones; deliver under deadlines.
• Lab bring-up and debugging of chips; contribute to documentation and patents.

Skills

Analog IC design

High-speed mixed-signal

PLL design

ADC design

RFIC design

Noise/jitter analysis

Transistor-level design

Biasing/reference circuits

Opamps/comparators

Lab bring-up

Python/MATLAB scripting

Verilog RTL/DSP concepts

Education

Master's or PhD in Electrical Engineering

Tools

Spectre

MATLAB

Python

Verilog RTL

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Job Description:

As an Analog/Mixed-Signal IC Design Engineer , you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role

Basic Qualifications:

• Pursuing a Master’s or PhD degree in EE is preferred

Desired Experience:

• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution are other high-speed analog circuits is a must
• Have a deep understanding of biasing, band-gaps, reference circuits, opamps, comparators and other analog circuits
• Solid track-record for implementation of analog circuits high-speed data transmission.
• Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a must
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.
• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity in programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.