Senior Serdes System Architect

Synopsys Inc; Porto Salvo; On-site; EUR 70,000 - 110,000; Full time

Benefits offered by this job

Health benefits

Wellness programs

Competitive rewards

Job summary

Synopsys Inc. is seeking a senior technical leader in high‑speed SerDes/PHY development to guide system architectures and drive signoff readiness across platforms.

You will influence cross‑functional teams, surface risks and tradeoffs, and ensure execution clarity from design to integration in cutting‑edge ICs and software content. The role calls for strong ownership, analytical rigor, and the ability to connect detailed engineering work to broad platform behavior while shaping Synopsys’s

Qualifications

• M.Sc. or Ph.D. in Electrical Engineering or related field.
• Strong experience in SerDes, PHY development, or closely related high-speed communication domains.
• Strong system-level technical understanding and ability to connect detailed engineering work to broader platform behavior.
• Experience solving complex technical problems across multiple stakeholders and competing constraints.
• Strong ability to assess tradeoffs, identify risks, and guide technical decisions with clarity.
• Excellent analytical, problem-solving, and technical communication skills.
• Programming or analysis experience in MATLAB, Python, or similar tools is an advantage.
• Experience in PHY analog design or strong technical exposure to analog-design-driven PHY development is highly valued.

Responsibilities

• Provide system-level technical leadership for assigned platforms and high-speed communication solutions.
• Connect system architecture, technical execution, and signoff readiness to drive stronger technical outcomes.
• Guide discussions on technical tradeoffs, platform behavior, assumptions, constraints, and risks.
• Contribute system- and signoff-informed insight to architecture reviews and key platform decisions.
• Strengthen technical ownership, execution predictability, and cross-functional alignment across the product-development flow.
• Shape stronger system-level technical decisions across advanced SerDes platforms.
• Improve the connection between architecture goals and execution outcomes.
• Increase technical clarity, risk visibility, and decision quality across complex projects.
• Help drive more robust and predictable platform-readiness and signoff practices.
• Contribute to Synopsys’s continued technical leadership in high-speed communication systems.

Skills

SerDes expertise

PHY development

System-level design

Cross-functional leadership

Decision making

Analytical skills

Education

M.S./Ph.D. in Electrical Engineering

Tools

MATLAB

Python

Job description

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are

You are a senior technical leader in high-speed communication systems with strong experience in SerDes and PHY development. You combine deep system-level understanding with the ability to guide technical direction, connect architecture intent with execution, and influence decisions across complex engineering work.

You are comfortable working across multiple teams and you bring the judgment to surface tradeoffs, risks, and priorities early. You are curious, rigorous, and practical, with a strong sense of ownership and a drive to improve both technical quality and execution clarity.

What You’ll Be Doing

• Provide system-level technical leadership for assigned platforms and high-speed communication solutions
• Connect system architecture, technical execution, and signoff readiness to drive stronger technical outcomes
• Guide discussions on technical tradeoffs, platform behavior, assumptions, constraints, and risks
• Contribute system- and signoff-informed insight to architecture reviews and key platform decisions
• Strengthen technical ownership, execution predictability, and cross-functional alignment across the product-development flow

The Impact You Will Have

• Shape stronger system-level technical decisions across advanced SerDes platforms
• Improve the connection between architecture goals and execution outcomes
• Increase technical clarity, risk visibility, and decision quality across complex projects
• Help drive more robust and predictable platform-readiness and signoff practices
• Contribute to Synopsys’s continued technical leadership in high-speed communication systems

What You’ll Need

• M.Sc. or Ph.D. degree in Electrical Engineering or a related field
• Strong experience in SerDes, PHY development, or closely related high-speed communication domains
• Strong system-level technical understanding and the ability to connect detailed engineering work to broader platform behavior
• Experience solving complex technical problems across multiple stakeholders and competing constraints
• Strong ability to assess tradeoffs, identify risks, and guide technical decisions with clarity
• Excellent analytical, problem-solving, and technical communication skills
• Programming or analysis experience in MATLAB, Python, or similar tools is an advantage
• Experience in PHY analog design or strong technical exposure to analog-design-driven PHY development is highly valued

Who You Are

• A strong technical leader with a clear ownership mindset
• Comfortable influencing across teams and disciplines while staying technically grounded
• Structured and thoughtful in how you approach complex engineering challenges
• A clear communicator who makes technical topics understandable and actionable
• Collaborative, curious, and committed to high standards of technical quality

The Team You’ll Be A Part Of

You will join our innovative and multidisciplinary system architecture team, where we are at the forefront of high-speed SerDes technology. Our team works on cutting-edge ICs up to 64Gbps, both in NRZ and PAM4 modulation formats. We collaborate closely to develop and refine SerDes models, optimize designs, and ensure the highest performance and reliability of our products. Together, we drive innovation in the semiconductor industry and shape the future of high-speed communication systems.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.