Analog Design, Staff Engineer

Synopsys, Inc.; Portugal; Híbrido; EUR 70 000 - 90 000; Tempo integral

Resumo da oferta

Synopsys, Inc. in Portugal seeks an experienced analog design engineer to join our IP Group in Porto or Lisbon.

You will conduct analog design simulation and analysis using in-development flows and collaborate with cross-functional teams to optimize tool usability and design efficiency. Requirements include a Bachelor’s/Master’s in EE and 3–5 years experience, proficiency with SPICE and EDA tools, knowledge of analog layout parasitics for low nm technologies, and strong English communication for

Qualificações

• Bachelor’s or Master’s degree in Electrical Engineering.
• 5+ years of related analog design experience preferred.
• Experience with analog design simulation and testbench methodologies.

Responsabilidades

• Conduct analog design simulation and analysis using in-development tool flows.
• Provide feedback to internal tools teams to improve usability and functionality.
• Document methods and training materials for internal designers.
• Improve efficiency of the analog design flow within the IP Group.

Conhecimentos

Analog design

EDA tools

SPICE

Layout knowledge

Formação académica

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Ferramentas

Synopsys Custom Compiler

Cadence Virtuoso

SPICE

Descrição da oferta de emprego

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are analog design engineer with a passion for creating cutting-edge technology. With a strong foundation in electrical engineering, you possess extensive experience in analog design simulation and analysis. You are adept at using various EDA tools for schematic entry, physical layout, and design verification, including SPICE notation and tools like Synopsys Custom Compiler or Cadence Virtuoso. Your familiarity with analog design simulation and testbench methodology, including AC, DC, Transient, and Monte-Carlo verifications, sets you apart.

Your strong communication skills in English enable you to effectively document methods and training materials, ensuring your team can leverage new tools and flows to increase efficiency. You are proactive in providing feedback to improve internal tools and are committed to streamlining design processes and reducing time-to-market.

What You'll Be Doing:

Conducting analog design simulation and analysis using novel in-development analog design tools and flows.

Providing feedback to internal tools teams to enhance tool functionality and usability.

Documenting methods, creating documentation, and training materials for internal designers.

Improving the efficiency of the analog design flow within the Synopsys IP Group.

Collaborating with cross-functional teams to ensure seamless integration and optimization of design tools.

The Impact You Will Have:

Enhancing the overall efficiency of analog design processes within Synopsys.

Reducing time-to-market for high-performance silicon chips and software content.

Driving innovation by providing valuable feedback to improve internal design tools and flows.

Contributing to the development of cutting-edge technology that shapes the future of the industry.

Ensuring the successful implementation of new design methodologies and tools within the team.

What You'll Need:

Bachelor's degree in electrical engineering and a minimum of 5 years of related experience or a Master's degree in electrical engineering and a minimum of 3 years of related experience.

Analog design skills and experience with designing for optimal PPA (power, performance, and area).

Proficiency in simulation using various analog design tools.

Experience with EDA tools for schematic entry, physical layout, and design verification.

Knowledge of analog layout parasitics, especially for low nm technologies (FinFET, GAA).

This role is open to Porto and Lisbon.

Who You Are:

Excellent communication skills in English.

A team player with a collaborative mindset.

Proactive in debugging and resolving issues independently.

Skilled in creating clear and concise documentation.

The Team You'll Be A Part Of:

You will be part of a dynamic team dedicated to streamlining design processes and reducing time-to-market. This team focuses on testing, improving, and training designers on cutting-edge flows and tools developed at Synopsys to enhance analog design efficiency. Your role will involve significant collaboration with cross-functional teams and mentoring junior engineers to foster a culture of continuous improvement and innovation.