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Blue Origin LLC is seeking a Senior Analog Mixed-Signal Design Verification Engineer to lead mixed-mode verification for SOCs and AMS models. The role defines co-simulation infrastructure and develops Verilog/SystemVerilog test benches with analog and digital teams.
The candidate will verify block- and chip-level designs, support bring-up, and perform AMS simulations, leveraging Cadence Virtuoso and scripting in Python/MATLAB. Strong communication is essential.
Blue Origin LLC is seeking a Senior Analog Mixed-Signal Design Verification Engineer to lead mixed-mode verification for SOCs and AMS models. The role defines co-simulation infrastructure and develops Verilog/SystemVerilog test benches with analog and digital teams.
The candidate will verify block- and chip-level designs, support bring-up, and perform AMS simulations, leveraging Cadence Virtuoso and scripting in Python/MATLAB. Strong communication is essential.