Principal Analog Mixed-Signal Verification Architect

Blue Origin; Kraków; Sur place; PLN 544 000 - 855 000; Plein temps

Résumé du poste

Blue Origin LLC is seeking a Principal Analog Mixed-Signal Design Verification Engineer to lead mixed-mode verification. You will define the co-simulation environment and develop models for AMS verification, collaborating with analog and digital teams to push the capabilities of space-grade IC design.

The role requires a strong background in CMOS analog/mixed-signal design, Verilog/SystemVerilog modeling, and extensive use of EDA tools such as Cadence Virtuoso.

Qualifications

• MS in Computer/Electrical Engineering required.
• 10+ years of relevant industry experience.
• CMOS analog mixed-signal circuit design and verification experience.
• Verilog/SystemVerilog modeling of analog/mixed-signal circuits and systems.
• Proficient with Cadence Virtuoso for schematic creation and simulation.
• Proficient in Python and MATLAB.
• Strong communication skills.
• PhD preferred and AMS verification in FinFET technology would be a plus.

Responsabilités

• Define the co-simulation methodology and EDA infrastructure with analog and digital teams.
• Create Verilog/SystemVerilog test benches and behavioral models of analog and mixed-mode circuits.
• Develop methodologies for block- and chip-level mixed-mode verification.
• Support analog and digital teams during model bring-up and usage.
• Perform AMS simulations.

Connaissances

AMS verification experience

Verilog/SystemVerilog

Python

MATLAB

Communication skills

Formation

MS in Computer/Electrical Engineering

PhD in Computer/Electrical Engineering

Outils

Cadence Virtuoso

Description du poste

Blue Origin LLC is seeking a Principal Analog Mixed-Signal Design Verification Engineer to lead mixed-mode verification. You will define the co-simulation environment and develop models for AMS verification, collaborating with analog and digital teams to push the capabilities of space-grade IC design.

The role requires a strong background in CMOS analog/mixed-signal design, Verilog/SystemVerilog modeling, and extensive use of EDA tools such as Cadence Virtuoso.