Senior IP Modeling Engineer

Lattice Philippines; Philippines; On-site; PHP 1,200,000 - 2,000,000; Full time

Job summary

Lattice Philippines seeks a Senior Design Engineer – Modeling to develop, validate, and deliver IP behavioral models and hardware collateral for internal and customer-facing use. You will translate IP specs and design intent into accurate, scalable models while driving verification, automation, and quality improvements across multiple projects.

You will collaborate with IP Design, Design Verification, Integration, Software, Architecture, and Applications teams, mentor engineers, and contribute

Qualifications

• Bachelor’s or Master’s degree in Electrical, Electronics, Computer Engineering or related field.
• Senior-level experience in digital, analog, FPGA/ASIC, or IP modeling and verification environments.
• Strong understanding of digital design fundamentals, RTL concepts, simulation, and V&V flow.
• Proficiency with Verilog/SystemVerilog for modeling and simulation.
• Knowledge of device behavior, timing, power, and signal integrity in IC contexts.
• Experience with scripting (Python, Perl, TCL, Shell) for automation.

Responsibilities

• Develop and maintain IP functional and behavioral models using Verilog, SystemVerilog, and SystemC/C++ tooling.
• Translate IP specifications and design intent into model requirements and verification objectives.
• Perform functional testing, audits, and regression checks against hardware references.
• Lead or support generation, validation, and release of timing, power, and metadata deliverables.
• Investigate and resolve model/hardware integration issues across the lifecycle.
• Develop scripts/workflows to improve model generation, validation, and reporting.
• Mentor engineers and promote consistent modeling and verification practices.

Skills

Verilog

SystemVerilog

SystemC

C++

Python

Perl

TCL

Shell

Collaboration

Education

Bachelor's or Master’s in Electrical/ Electronics/ Computer Engineering

Tools

Verilog simulators

SystemVerilog simulators

SPICE-type simulation

Job description

Lattice Philippines seeks a Senior Design Engineer – Modeling to develop, validate, and deliver IP behavioral models and hardware collateral for internal and customer-facing use. You will translate IP specs and design intent into accurate, scalable models while driving verification, automation, and quality improvements across multiple projects.

You will collaborate with IP Design, Design Verification, Integration, Software, Architecture, and Applications teams, mentor engineers, and contribute