Senior ASIC Digital Implementation Lead (RTL–GDSII)

Xinyx Design Consultancy & Services, Inc.; Muntinlupa; On-site; PHP 900,000 - 1,300,000; Full time

Job summary

Xinyx Design Consultancy & Services, Inc. in Metro Manila seeks a Senior Digital Implementation Engineer to lead end-to-end ASIC/FPGA implementation, including synthesis, place-and-route, and timing closure. You will drive RTL/Verilog execution, optimize for timing, and ensure design intent is met.

You will mentor junior engineers and collaborate with RTL, verification, and physical design teams to ensure robust timing closure and project success.

Qualifications

• Strong RTL/Verilog skills and experience.
• Hands-on experience with major EDA flows.
• Experience leading end-to-end ASIC/FPGA implementation projects.

Responsibilities

• Lead end-to-end ASIC/FPGA implementation including synthesis, place-and-route (P&R), and timing closure.
• Drive optimization to meet timing goals and design intent.
• Mentor junior engineers and collaborate with RTL, verification, and physical design teams.

Skills

RTL/Verilog

ASIC/FPGA impl.

Mentorship

Tools

EDA flows

Job description

Xinyx Design Consultancy & Services, Inc. is seeking a Senior Digital Implementation Engineer in Metro Manila to lead end-to-end ASIC/FPGA implementation, including synthesis, place-and-route, and timing closure.

The role requires strong RTL/Verilog skills and hands-on experience with major EDA flows. You will drive optimization, mentor junior engineers, and collaborate with RTL, verification, and physical design teams to ensure design intent and timing goals are met.