Junior Design Verification Engineer (Digital & Mixed‑Signal)

Analog Devices, Inc.

Hinoba-an

Sur place

PHP 420 000 - 660 000

Plein temps

14 jours+

Une candidature complète en une minute

Un CV et une lettre de motivation personnalisés, prêts à envoyer.

Passez les filtres ATS

Résumé du poste

Analog Devices, Inc. is hiring an Associate Design Verification Engineer to develop test benches and verify digital, analog, and mixed-signal products before tape-out.

This entry-level role emphasizes learning under close direction with regular review, gaining hands-on verification experience and mentorship for professional growth. You will work with experienced engineers to verify design intent, build basic environments, and contribute to documentation and planning while developing skills in

Qualifications

  • Basic proficiency in SystemVerilog and UVM for digital design verification.
  • Basic scripting knowledge in Python, Perl or TCL to support automation tasks.
  • Fundamental understanding of Verilog RTL concepts.
  • Familiarity with common digital interfaces (I2C, SPI, UART).

Responsabilités

  • Develop and execute basic test benches for mixed-signal product verification.
  • Create and maintain basic test environments using SystemVerilog/UVM.
  • Conduct code coverage analysis to ensure design accuracy.
  • Debug simulation failures and track coverage metrics.
  • Support verification planning and documentation.
  • Collaborate with design teams to understand requirements.
  • Identify potential design issues under guidance of senior team members.
  • Document verification processes and results.

Connaissances

SystemVerilog/UVM
Python
Perl
TCL
Verilog RTL
Digital Interfaces (I2C/SPI/UART)
Communication

Formation

Bachelor's degree in Electrical Engineering / Electronics and Communications Engineering / Computer Engineering

Description du poste

Analog Devices, Inc. is hiring an Associate Design Verification Engineer to develop test benches and verify digital, analog, and mixed-signal products before tape-out.

This entry-level role emphasizes learning under close direction with regular review, gaining hands-on verification experience and mentorship for professional growth. You will work with experienced engineers to verify design intent, build basic environments, and contribute to documentation and planning while developing skills in

Obtenez votre examen gratuit et confidentiel de votre CV.

ou faites glisser et déposez votre fichier ici.

Similar jobs

Postes similaires à comparer

Junior Design Verification Engineer - SystemVerilog/UVM
Junior Design Verification Engineer - SystemVerilog/UVM

Analog Devices, Inc. • Luan

Sur place
PHP 4 411 000 - 6 301 000
Competitive compensation
Comprehensive benefits
Work-life balance
Entry-Level Design Verification Engineer: SystemVerilog/UVM
Entry-Level Design Verification Engineer: SystemVerilog/UVM

Analog Devices • Cavite City

Sur place
PHP 480 000 - 600 000
Associate Design Verification Engineer (SystemVerilog/UVM)
Associate Design Verification Engineer (SystemVerilog/UVM)

Analog Devices, Inc. (ADI) • Philippines

Sur place
PHP 300 000 - 420 000
Entry-Level Design Verification Engineer
Entry-Level Design Verification Engineer

Analog Devices, Inc. • Imus

Sur place
PHP 240 000 - 360 000
Junior Design Verification Engineer - SystemVerilog/UVM
Junior Design Verification Engineer - SystemVerilog/UVM

Analog Devices, Inc. • Philippines

Hybride
PHP 240 000 - 480 000
Associate Design Verification Engineer
Associate Design Verification Engineer

Analog Devices, Inc. • Imus

Sur place
PHP 240 000 - 360 000
Associate Design Verification Engineer
Associate Design Verification Engineer

Analog Devices, Inc. (ADI) • Philippines

Sur place
PHP 300 000 - 420 000
Associate Design Verification Engineer
Associate Design Verification Engineer

Analog Devices • Cavite City

Sur place
PHP 480 000 - 600 000
Associate Design Verification Engineer
Associate Design Verification Engineer

Analog Devices, Inc. • Hinoba-an

Sur place
PHP 420 000 - 660 000
Associate Design Verification Engineer
Associate Design Verification Engineer

Analog Devices, Inc. • Luan

Sur place
PHP 4 411 000 - 6 301 000
Competitive compensation
Comprehensive benefits
Work-life balance