IC Test Engineer: ATE Test Optimization & Yield Analysis

As PowerUp; Manila; On-site; PHP 480,000 - 750,000; Full time

Job summary

As PowerUp in the Philippines seeks a production test engineer to develop test programs on ATE platforms (Advantest V93000, Teradyne UltraFLEX, or equivalent) for functional, parametric and structural tests. Translate ATPG patterns and memory BIST specs into executable test plans.

You will characterize silicon across PVT corners during NPI, analyzing Iddq, dynamic current, speed bins and analog parametrics (ADC, PLL jitter).

Responsibilities

• Develop production test programs on ATE (Advantest V93000, Teradyne UltraFLEX, or equivalent) for functional, parametric, and structural test.
• Define test specification from ATPG patterns, memory BIST, and functional test cases; translate to ATE-executable test plans.
• Characterize silicon across PVT corners during NPI: Iddq, dynamic current, speed bins, and analog parametrics (ADC, PLL jitter).
• Optimize test time: parallel test strategy, step reordering, and adaptive test to minimize cost-of-test.
• Drive yield analysis: Pareto dashboards, failure mode ID, RCA with RTL/PD/DFT teams.

Job description

As PowerUp in the Philippines seeks a production test engineer to develop test programs on ATE platforms (Advantest V93000, Teradyne UltraFLEX, or equivalent) for functional, parametric and structural tests. Translate ATPG patterns and memory BIST specs into executable test plans.

You will characterize silicon across PVT corners during NPI, analyzing Iddq, dynamic current, speed bins and analog parametrics (ADC, PLL jitter).