DFT Engineer - Hybrid SoC Test & Silicon Validation

Arm Limited; Hinoba-an; On-site; PHP 420,000 - 680,000; Full time

Job summary

Arm Limited is seeking a DFT Engineer to design, implement, and validate DFT techniques for test chips and hard macros. You will insert DFT logic at RTL and gate level, validate features, and create ATE test patterns for silicon.

Collaborate with RTL, verification, synthesis, P&R, and silicon validation teams across the project lifecycle, from early investigation to tape-out and characterization. A degree in electronic/computer engineering is required.

Qualifications

• 2 to 5 years of proven DFT experience.
• Experience coding Verilog RTL, TCL and/or Perl.
• Proficient in Unix/Linux environments.
• Bachelor’s or Master’s degree in Electronic/Electrical or Computer Engineering or related field.

Responsibilities

• Architect, implement, and validate DFT techniques on test chips and hard macros.
• Insert DFT logic into SoC RTL and gate-level designs, validate features, and generate ATE test patterns for silicon.
• Collaborate with front-end design and verification, back-end synthesis, P&R, and silicon validation teams.

Skills

Verilog RTL

TCL/Perl

Unix/Linux

DFT concepts

Education

Bachelor's or Master's in EE/CE

Tools

Siemens DFT tools

Cadence DFT tools

Synopsys DFT tools

Job description

Arm Limited is seeking a DFT Engineer to design, implement, and validate DFT techniques for test chips and hard macros. You will insert DFT logic at RTL and gate level, validate features, and create ATE test patterns for silicon.

Collaborate with RTL, verification, synthesis, P&R, and silicon validation teams across the project lifecycle, from early investigation to tape-out and characterization. A degree in electronic/computer engineering is required.