ASIC Implementation Engineer – Physical Design & PPAT

Arm Limited; Hinoba-an; Hybrid; PHP 600,000 - 1,200,000; Full time

Job summary

Arm Limited is seeking a highly capable ASIC implementation engineer to drive synthesis, physical design, timing closure and signoff for CPU cores and interconnect. You will analyze timing, area and power to improve Arm designs and optimize flows with internal and external teams.

You will also develop new methodologies and deploy data-mining techniques to boost implementation efficiency. The role requires 3–5 years in ASIC/physical design, strong communication and problem-solving skills, and

Qualifications

• 3–5 years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification.
• Strong Communication and Problem-Solving Skills.
• Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams.

Responsibilities

• Synthesis, Physical implementation, Timing closure and Physical signoff of CPU cores, system interconnect, and other ARM Designs.
• Analyze design timing, area and power to help improve the quality of ARM Design.
• Optimize design, flow and methodologies to achieve best in class PPAT working with various internal and external teams.
• Develop and deploy new methodologies to improve implementation efficiency and results
• Support and develop detailed implementation analysis and data-mining methodologies.
• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.
• Converting R&D concepts into real implementation solutions.
• Enable our partners to achieve the best possible quality of results

Skills

ASIC implementation

Physical design

STA and timing closure

Structured clock tree

PDN analysis

DFM

Physical verification

Communication skills

Problem-solving

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Job description

Arm Limited is seeking a highly capable ASIC implementation engineer to drive synthesis, physical design, timing closure and signoff for CPU cores and interconnect. You will analyze timing, area and power to improve Arm designs and optimize flows with internal and external teams.

You will also develop new methodologies and deploy data-mining techniques to boost implementation efficiency. The role requires 3–5 years in ASIC/physical design, strong communication and problem-solving skills, and