Physical Design Engineer/STA

Altera Corporation; Hinoba-an; On-site; PHP 600,000 - 900,000; Full time

Job summary

Altera Corporation seeks a highly skilled engineer to drive full physical design flows from RTL to GDS for complex IP and SoC blocks. You will manage synthesis, place & route, floor planning, clock tree synthesis, and rigorous timing and power analyses.

The role requires strong expertise in EDA tools and signoff verification to ensure robust design closures. The candidate will optimize power, frequency, and area while contributing to methodology improvements and flow automation.

Qualifications

• Experience with physical design flow and RTL-to-GDS conversion.
• Proficiency in timing, power/clock distribution, reliability and P&G analyses.
• Familiarity with formal verification, STA, and signoff processes.

Responsibilities

• Perform physical design implementation from RTL to GDS for custom IP and SoC designs.
• Execute synthesis, place and route, clock tree synthesis, floor planning, STA, power integrity, and layout verification.
• Conduct verification and signoff including EDA-based checks and rules enforcement; analyze results and optimize parameters.

Skills

Physical design

Timing closure

Power analysis

Clock tree synthesis

Place & route

DFT

Synthesis

EDA tools

Tools

EDA tools

Job description

Job Details: Job Description:

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

Job Type: Regular Shift: Shift 1 (India) Primary Location: Regus, Madhapur Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

About Altera Altera:

Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.