Digital Design Engineer — Oslo (Flexible Hours, 5 Weeks Vacation)

Silicon Labs GmbH; Oslo; Hybrid; NOK 479,000 - 890,000; Full time

Benefits offered by this job

Monthly social gatherings

Sport activities

Hack a Gecko – innovation day

Weekly info meetings

Volunteer days

5 weeks vacation

Parking and flexible hours

Free mobile phone

Great culture

Job summary

Silicon Labs in Oslo is seeking a Digital Design Engineer to join our Oslo Digital Design team. You will work on RTL design, verification, and integration for next‑gen IoT MCU/wireless products, collaborating with analog, software, and product groups to deliver robust digital features.

The ideal candidate is a recent graduate with a foundation in digital design and VHDL/Verilog/SystemVerilog, capable of learning quickly and communicating clearly in English.

Qualifications

• Foundation in digital logic, computer architecture, or embedded systems.
• Experience with HDL (Verilog/SystemVerilog or VHDL).
• Exposure to digital verification via simulations, testbenches, or formal methods an advantage.
• Familiarity with synthesis, timing, and power/area tradeoffs an advantage.

Responsibilities

• Define, implement, and deliver key digital features for Silicon Labs in Oslo.
• Collaborate with digital verification, analog, software, and product teams through RTL implementation and verification.
• Contribute to RTL design, timing optimization, and integration within mixed-signal systems.

Skills

Digital design fundamentals

Verilog/SystemVerilog

RTL design

Simulation/testbenches

Formal verification

Python/scripting

English communication

Education

B.S./M.S. in Electrical or Computer Engineering

Tools

Linux

Python

Bash

Job description

Silicon Labs in Oslo is seeking a Digital Design Engineer to join our Oslo Digital Design team. You will work on RTL design, verification, and integration for next‑gen IoT MCU/wireless products, collaborating with analog, software, and product groups to deliver robust digital features.

The ideal candidate is a recent graduate with a foundation in digital design and VHDL/Verilog/SystemVerilog, capable of learning quickly and communicating clearly in English.