Staff Digital Design Engineer

OMNIVISION; Oslo; On-site; NOK 750,000 - 950,000; Full time

Job summary

OMNIVISION is seeking a candidate for a digital design role in Oslo. Responsibilities include designing digital IP for CIS, defining chip architecture, and performing logic synthesis. Ideal candidates will have an MSEE and at least 7 years of digital design experience, with expertise in RTL design and verification. Strong knowledge of the chip development cycle and excellent English skills are essential. This role offers the opportunity to innovate in design flow and mentor junior engineers.

Qualifications

• Minimum MSEE + at least 7 years of digital design experience.
• Expertise in RTL design and verification for ASICs.
• Experience handling logic synthesis and static timing analysis.
• Knowledge of chip development cycle from specification to validation.
• Technical lead experience is a plus.
• Knowledge of ASIL and DFT is a plus.
• Image processing/DSP knowledge is a plus.
• Ability to work collaboratively across functional areas.

Responsibilities

• Design and verification of digital IP for CIS.
• Define chip level architecture considering power, performance & area.
• Perform logic synthesis and work with backend team.
• Drive innovation in design flow.
• Mentor junior team members.
• Participate in project planning and tracking.
• Full-chip integration and verification.
• Silicon bring-up, validation and debug.

Skills

RTL design and verification

Logic synthesis

Static timing analysis

Chip development cycle knowledge

English proficiency

Education

MSEE

Job description

Responsibilities

• Design and verification of digital IP for CIS
• Define chip level architecture taking into consideration power, performance & area trade-offs; build top level and module specification
• Perform logic synthesis, work with backend team for floor planning, STA and DFT
• Drive innovation and continuous improvement of design flow
• Mentor junior team members
• Participate in project planning and progress tracking
• Full-chip integration and verification
• Silicon bring-up, validation and debug

Qualifications

• Minimum MSEE + at least 7 yrs. of digital design experience
• Expertise in RTL design and verification for ASICs.
• Experience handling logic synthesis and static timing analysis for multiple projects
• Knowledge of all aspects of chip development cycle from design specification, architecture definition, low-power design, tape-out, to chip validation and debug
• Technical lead experience is a plus
• Knowledge of ASIL is a plus
• Knowledge of DFT is a plus
• Image processing/DSP knowledge is a plus
• Excellent command of English as a working language is a must
• Ability to work collaboratively with people across multiple functional areas

Please include a cover letter outlining your motivation to move to, live and work in Oslo, Norway.