CTO

Nigel Wright Group; Oslo; On-site; NOK 2,000,000 - 4,000,000; Full time

Benefits offered by this job

Equity-based compensation

Direct exposure to board

Job summary

Qualifications

• Hands-on experience taking a chip from tape-out through first-silicon bring-up, including wafer test, packaging, characterization, and silicon debug.
• Track record in maturing technology to a commercial scale.
• Experience managing re-spin decisions and negotiating them with foundries and assembly partners.
• Depth in digital ASIC architecture, ideally spanning both high-throughput compute and AI inference.

Responsibilities

• Own tape-out through bring-up, characterization, and validation; manage re-spin risk with foundry/assembly partners and drive toward commercial maturity.
• Lead the next-generation ASIC roadmap: migration to a more advanced process node and denser second-generation chip; own compute and AI inference architecture.
• Represent the company technically to the board, investors, and Arctic AI JV partners; balance ambition with finite resources.

Skills

Chip bring-up

Technology maturation

Re-spin decisions

ASIC architecture

Hardware & cloud software

Board/market communication

Job description

About Lokotech

Lokotech Group is a Norwegian semiconductor and hardware company, listed on Euronext Growth Oslo, building dual-purpose ASIC technology: a 12nm Scrypt mining ASIC with an AI inference path that forms the basis of our long‑term edge AI strategy. The group spans chip development, hardware products (including the SPDU power distribution line), mining pool software through Powerpool in Madrid, and hosting and datacenter infrastructure in Northern Norway, where our Kautokeino site serves as the test and verification environment for hardware, cooling, and heat recovery.

We are a small, agile, relatively capital‑light and milestone‑driven organization. The group currently has five employees, but we are growing in both engineering, sales and supporting roles. Development is self‑financed, and the AI capability is treated as long‑term optionality to be sequenced carefully against a finite balance sheet.

About the role

We are hiring a CTO to lead the company through first‑silicon bring‑up in H2 2026 and to own the technology roadmap from there: a second‑generation ASIC on a more advanced node, an edge AI joint venture, and a portfolio of supporting hardware and software products.

This is a player‑coach position. You will combine executive responsibility for foundry and roadmap decisions with direct, hands‑on engineering work, including silicon debug. You will also represent the company technically to the board, to public markets, and to the partners in our Arctic AI joint venture negotiations.

What you will do

Your first priority is bringing our first silicon to life. You will own the path from tape‑out through bring‑up, characterization, and validation, manage re‑spin risk together with our foundry and assembly partners, and drive the design toward commercial maturity on an aggressive timeline.

From there, you will lead the next generation of our ASIC roadmap: a migration to a more advanced process node and a denser, more efficient second‑generation chip. You will own the architecture across both the compute and AI inference paths, since the dual‑purpose nature of the chip is the strategic thesis of the company.

What we are looking for

Must have

• Hands‑on experience taking at least one chip from tape‑out through first‑silicon bring‑up, including wafer test, packaging, characterization, and silicon debug.
• Track record in maturing technology to a commercial scale.
• Experience managing re‑spin decisions and negotiating them with foundries and assembly partners.
• Depth in digital ASIC architecture, ideally spanning both high‑throughput compute and AI inference.
• Comfort spanning hardware and cloud software, with working firmware and embedded competence.
• Credibility with a board and public markets. As a Euronext Growth listed company, you will be quoted in reports and must communicate engineering risk (re‑spins, corner cases, time‑to‑market) in a measured, honest way.

Strong plus

• Edge AI inference expertise: quantization, low‑power design, and the compiler and runtime stack.
• A completed node shrink or process port, with the foundry relationships to match.
• Yield optimization and maskset refinement experience.
• Power electronics and datacenter infrastructure literacy, particularly liquid cooling and harsh‑environment or Arctic operation.
• Experience building distributed teams across countries and time zones.
• Familiarity with the competitive dynamics of inference silicon versus hyperscaler offerings.

How you work

• First and foremost hands‑on. There is no large organization beneath you; you are the senior engineer as well as the executive.
• Effective across a distributed structure and with external partners: foundry, IC assembly, JV counterparties.
• Disciplined about sequencing ambition against a finite balance sheet. We fund our own development and hit milestones before we expand scope.
• Remains calm, analytical and constructive under pressure
• Hands‑on and humble
• Practical, commercially aware and disciplined about priorities

What we offer

• A rare mandate: full technical ownership of a listed semiconductor company at the moment its first silicon comes back.
• Direct exposure to the board, the market, and every major technical decision.
• The chance to build an edge AI business from the ground up, backed by real silicon and real infrastructure in one of the world's best locations for low‑cost, low‑carbon compute.
• A very varied work‑load with the commitments and flexibilites that follows
• Competitive salary and equity‑based compensation

For this recruitment, Lokotech is working together with Nigel Wright Group. Any questions may be directed to Tove Bruhn.