Sr DfT Architect: SoC Test Strategy & Innovation

NXP Semiconductors

Nijmegen

On-site

EUR 120,000 - 180,000

Full time

5 days ago
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Job summary

NXP Semiconductors in the Netherlands is seeking a Design-for-Test (DfT) Architect to define and govern the DfT strategy for complex SoCs and IPs. The role coordinates across architecture, design, verification, physical design, product engineering and test engineering to ensure optimal test quality and manufacturability.

As a technical leader, you translate product requirements into a comprehensive DfT specification, drive scalable solutions, mentor engineers and influence tool roadmaps while

Qualifications

  • MSc or PhD in Electrical Engineering, Computer Engineering or related discipline.
  • Experience 15+ years of experience in semiconductor development.
  • Proven experience as DfT Architect, Lead Engineer or Technical Lead.
  • Track record delivering complex SoC products from concept through production.

Responsibilities

  • DfT strategy & architecture for SoCs and IPs; establish DfT specifications.
  • Act as technical lead for DfT implementation teams and coordinate across disciplines.
  • Define test concepts, fault modelling and coverage strategies to achieve target quality.
  • Develop and deploy new DfT methodologies and drive standardization across projects.

Skills

DfT architecture
ATPG
JTAG/IEEE1687
Memory BIST
Analog DfT
Fault modelling
RTL design & verification
Leadership

Education

MSc in Electrical or Computer Engineering
PhD in related discipline

Tools

Synopsys
Cadence
Siemens

Job description

NXP Semiconductors in the Netherlands is seeking a Design-for-Test (DfT) Architect to define and govern the DfT strategy for complex SoCs and IPs. The role coordinates across architecture, design, verification, physical design, product engineering and test engineering to ensure optimal test quality and manufacturability.

As a technical leader, you translate product requirements into a comprehensive DfT specification, drive scalable solutions, mentor engineers and influence tool roadmaps while

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