Senior DfT Architect – SoC Test Strategy & Innovation

NXP Semiconductors; Eindhoven; Hybrid; EUR 140,000 - 190,000; Full time

Job summary

NXP Semiconductors in the Netherlands seeks a Design for Test Architect to define and govern the DfT strategy for complex SoCs and IPs. You will coordinate across architecture, design, verification, physical design, product engineering and test engineering to ensure test quality and manufacturability.

The role requires MSc/PhD, 15+ years in semiconductor development, and proven leadership delivering DfT solutions from concept to production.

Qualifications

• MSc or PhD in Electrical/Computer Engineering or related discipline.
• 15+ years of experience in semiconductor development.
• Proven experience as DfT Architect or Technical Lead.

Responsibilities

• Define the overall DfT strategy for SoCs and IPs.
• Act as technical lead for DfT implementation teams.
• Drive fault modelling, coverage strategy and DfT production readiness.
• Lead DfT reviews and drive standardization across projects.

Skills

DfT Architecture

Technical Leadership

RTL design

Fault modelling

Education

MSc or PhD in Electrical Engineering or Computer Engineering

Tools

Synopsys

Cadence

Siemens

Job description

NXP Semiconductors in the Netherlands seeks a Design for Test Architect to define and govern the DfT strategy for complex SoCs and IPs. You will coordinate across architecture, design, verification, physical design, product engineering and test engineering to ensure test quality and manufacturability.

The role requires MSc/PhD, 15+ years in semiconductor development, and proven leadership delivering DfT solutions from concept to production.