Lead MTS Logic Design Engineer for Secure Silicon IP (Hybrid)

Rambus.com

Vught

Hybrid

EUR 120,000 - 160,000

Full time

14 days+
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Benefits offered by this job

Hybrid work model
Competitive compensation package

Job summary

Rambus in Vught, Netherlands, seeks a Lead Member of Technical Staff Logic Design Engineer to join the Silicon IP team within the Security Business Unit. The role is full-time with a hybrid work model, typically three days onsite and two days remote, reporting to the Director of R&D Silicon IP.

The candidate will bring deep embedded hardware development, cryptography, and security expertise to design and verify complex silicon IP and collaborate across engineering, product management, and sales

Qualifications

  • BS or MS degree in Hardware Engineering, Computing Science or comparable level.
  • Eight or more years of experience in the security or chip industry in relevant engineering positions.
  • In depth knowledge of SoC, Silicon IP and/or FPGA logic design flows.
  • In depth knowledge of hardware description languages (Verilog, VHDL, SystemVerilog) and scripting languages.
  • Strong written and verbal communication skills: ability to explain complex concepts to a technical audience.
  • Good documentation skills, both in text and drawings.

Responsibilities

  • Design and implementation of complex secure silicon IPs.
  • Plan: lead other digital designers, manage projects, estimate cost (effort).
  • Architecture: design block specification, documentation, have/encourage patents for current and future products.
  • Implementation: RTL design, lint, clock domain crossing (CDC) analysis, synthesis, IP release.
  • Verification: work with verification team on planning and execution, simulations, debugging simulations, formal verification, reviews and documentation.
  • Flow and methodology: work in a dynamic R&D group that influences Rambus’ technical direction.
  • Interact with technical leaders and senior staff to ensure high-value product development.

Skills

RTL design
Verilog/VHDL/SystemVerilog
Digital design
Hardware security

Education

BS or MS in Hardware Engineering or Computing Science

Tools

Scripting languages

Job description

Rambus in Vught, Netherlands, seeks a Lead Member of Technical Staff Logic Design Engineer to join the Silicon IP team within the Security Business Unit. The role is full-time with a hybrid work model, typically three days onsite and two days remote, reporting to the Director of R&D Silicon IP.

The candidate will bring deep embedded hardware development, cryptography, and security expertise to design and verify complex silicon IP and collaborate across engineering, product management, and sales

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