Hybrid Lead MTS: Secure Silicon IP & RTL Design

Rambus.com; Vught; Hybrid; EUR 110,000 - 170,000; Full time

Job summary

Rambus invites a senior Lead Member of Technical Staff Logic Design Engineer to join the Silicon IP team in Vught, NL, part of the Security Business Unit. You will report to the Director of R&D Silicon IP and drive complex secure silicon IP design, with a hybrid work model allowing for onsite and remote work.

The role emphasizes deep knowledge of embedded hardware, cryptography, and security implementations; collaboration with cross-functional teams to deliver high-value products.

Qualifications

• Eight or more years of experience in the security or chip industry.
• In-depth knowledge of SoC, Silicon IP and FPGA design flows.
• In-depth knowledge of HDL (Verilog, VHDL, SystemVerilog) and scripting languages.
• Strong written and verbal communication; ability to explain complex concepts.
• Excellent documentation skills, both in text and drawings.
• Beneficial experience with IP integration, IP core delivery, and handoff issues.
• Knowledge of PCIe IDE standard.
• Personal attributes: analytical, team-oriented, self-motivated, able to prioritize tasks in a fast-paced environment.

Responsibilities

• Design and implementation of complex secure silicon IPs.
• Plan: lead other digital designers, manage projects, estimate cost (effort).
• Architecture: design block specifications, documentation, and encourage patents for current and future products.
• Implementation: RTL design, lint, CDC analysis, synthesis, IP release.
• Verification: collaborate with verification team on planning/execution, simulation, debugging, formal verification, reviews.
• Flow and methodology: contribute to flow and methodology development in a dynamic R&D group.
• Interact with technical leaders and senior staff to ensure development of high-value products.

Skills

Experience in security/chip industry

SoC / Silicon IP / FPGA design flows

HDL Verilog/VHDL/SystemVerilog

Communication skills

Documentation

Education

Bachelor's/Master's in Hardware Engineering or Computing Science

Job description

Rambus invites a senior Lead Member of Technical Staff Logic Design Engineer to join the Silicon IP team in Vught, NL, part of the Security Business Unit. You will report to the Director of R&D Silicon IP and drive complex secure silicon IP design, with a hybrid work model allowing for onsite and remote work.

The role emphasizes deep knowledge of embedded hardware, cryptography, and security implementations; collaboration with cross-functional teams to deliver high-value products.