Turing Chip Project- ASIC Front end development project manager(A101996)

XPENG; Kuala Lumpur; On-site; MYR 180,000 - 240,000; Full time

Benefits offered by this job

Interesting role at XPENG

Large internal/external contact

Attractive salary incl. pension

Growth with EV brand in Europe

Job summary

XPENG is seeking an experienced Front-end Project Manager to lead front-end ASIC/SoC design and verification efforts in Kuala Lumpur. You will drive end-to-end project lifecycles, coordinate architecture, RTL, verification and back-end teams, and ensure timely handoffs with rigorous quality.

The role requires 5+ years in semiconductor IC design, with at least 3 years in project leadership, and strong English and Mandarin communication skills.

Qualifications

• Bachelor’s degree or higher in Microelectronics, Electronic Engineering, Computer Engineering or related discipline.
• 5+ years in semiconductor IC design with 3+ years as Project Manager or Technical Lead for front-end digital design/verification.
• Strong knowledge of the digital chip design flow, RTL design and verification methodologies.
• PMP, Agile or Scrum Master certification preferred.

Responsibilities

• Front-end Project Management: oversee lifecycle from architecture to RTL coding, simulation, bug tracking and handoff.
• Cross-functional coordination: act as hub between architecture, RTL, verification and back-end teams.
• Schedule & resource planning: define milestones and allocate resources; track progress.
• Risk & issue management: identify bottlenecks and escalate critical issues when needed.
• Quality & methodology assurance: ensure adherence to design/verification standards; monitor metrics.

Skills

English

Mandarin

Leadership

Problem solving

Cross-functional

Project management

Bug-tracking tools

Version control

Collaboration tools

Education

Bachelor’s degree in Microelectronics

Tools

Project management tools

Bug-tracking tools

Version control systems

Job description

• Front-end Project Management: Oversee the complete lifecycle of front-end ASIC/SoC design and verification projects , from initial architecture definition and RTL coding to simulation, bug tracking, and final design handoff (RTL freeze).
• Cross-Functional Coordination: Act as the central communication hub for the local engineering teams. Coordinate closely across architecture, RTL design, verification, and physical design (back-end) groups to ensure seamless collaboration and alignment on technical specifications.
• Schedule & Resource Planning: Develop comprehensive project schedules, define milestones, and allocate resources efficiently within the local team. Monitor daily/weekly progress against baseline plans to ensure timely delivery of design targets.
• Risk & Issue Management: Proactively identify potential technical bottlenecks and schedule risks. Formulate effective mitigation strategies, drive cross-functional troubleshooting, and elevate critical issues to company management when necessary.
• Quality & Methodology Assurance: Ensure the local team adheres to industry-standard design and verification methodologies. Monitor key metrics such as verification coverage, bug resolution rates, and design quality to ensure a flawless handoff to the back-end stages.
• Process Optimization: Continuously evaluate and improve project management processes, workflows, and communication channels to enhance overall R&D efficiency and team productivity.

Qualifications

• Education: Bachelor’s degree or higher in Microelectronics, Electronic Engineering, Computer Engineering, or a related technical discipline.
• Industry Experience: 5+ years of experience in the semiconductor IC design industry, with a minimum of 3 years serving in a Project Manager or Technical Lead capacity specifically focused on front-end digital design and verification.
• Technical Acumen: Strong foundational knowledge of the digital chip design flow. Familiarity with RTL design, verification methodologies.
• Project Management Skills: Proven track record of successfully taping out complex SoC or ASIC projects on schedule. PMP, Agile, or Scrum Master certification is highly preferred.
• Soft Skills: Outstanding leadership and problem-solving abilities. Highly detail-oriented with the capacity to manage multiple tasks under pressure in a dynamic, fast-paced R&D environment.
• Language: Fluent in both written and spoken English and Mandarin (essential for complex technical discussions and internal engineering alignment).
• Tools: Highly proficient in project management, collaboration, and bug-tracking tools . Familiarity with version control systems used in IC design is a plus.

XPENG offers

• An interesting, unique and very varied job at XPENG
• A job with an incredibly large contact surface both internally and externally
• An attractive salary package incl. pension and with the possibility of a bonus
• To be involved in the growth of an existing EV brand in Europe

Next steps

For more information on how we process your personal data, please see: https://www.xpeng.com/policy

As part of our application process, certain positions at our company require a pre-employment screening to ensure the reliability and integrity of our employees. This screening is a standard procedure and may include components such as a Criminal Background Check from your current or previous country of residence over the past five years. Additionally, the process may involve an integrity questionnaire, verification of identification, diplomas, work experience, and consultation of the central insolvency register.

We appreciate your understanding and cooperation in this important matter, as it helps us maintain the high standards expected by our team.

Our Commitment to Diversity and Inclusion

At XPENG, we’re an equal-opportunity employer that values diversity and positively encourages applications from suitably qualified and eligible candidates regardless of race, religion, sex, national origin, gender, sexual orientation, age, marital status, disability status or other applicable legally protected characteristics.