Signal Integrity/Power Integrity Engineer

Avensys Consulting; Kuala Lumpur; On-site; MYR 180,000 - 260,000; Full time

Benefits offered by this job

Base salary

Company benefits

Career progression

Job summary

Avensys Consulting is seeking a Senior / Staff-level Signal Integrity & Power Integrity Engineer in Kuala Lumpur. The role centers on SI/PI analysis for semiconductor packages, substrates, and high-speed interconnects, with close collaboration to Mandarin-speaking stakeholders and cross-functional teams.

The candidate will analyze DDR, PCIe, Ethernet and SerDes interfaces, develop models (IBIS/IBIS-AMI/S-parameters), and drive package-board co-design activities.

Qualifications

• 5+ years of relevant engineering experience.

Responsibilities

• Perform Signal Integrity (SI) and Power Integrity (PI) analysis for semiconductor packages, substrates, boards, and high-speed interconnects.
• Support package design and package-board / chip-package-board co-design activities.
• Analyze high-speed interfaces including DDR, PCIe, Ethernet, SerDes, and other high-speed I/O technologies.
• Conduct eye diagram and jitter analysis, crosstalk assessment, impedance discontinuity analysis, and signal loss evaluation.
• Perform Power Delivery Network (PDN) and Power Integrity analysis to identify and resolve power delivery issues.
• Develop and use simulation models including IBIS, IBIS-AMI, and S-parameters for channel and system-level analysis.
• Perform S-parameter extraction and channel simulation/modeling for high-speed interconnects.
• Collaborate with package, substrate, board, architecture, design, and validation teams to identify design risks and drive solutions.
• Communicate technical findings, recommendations, and design trade-offs to engineering stakeholders and Mandarin-speaking teams.

Skills

Mandarin language

Tools

Ansys HFSS

Ansys SIwave

Cadence Sigrity

Keysight ADS

HyperLynx

Job description

Avensys is a reputed global IT professional services company headquartered in Singapore. Our service spectrum includes enterprise solution consulting, business intelligence, business process automation and managed services. Given our decade of success we have evolved to become one of the top trusted providers in Singapore and service a client base across banking and financial services, insurance, information technology, healthcare, retail and supply chain.

Contract Type: 1 Year Renewable Contract

Position Overview

We are seeking a Senior / Staff-level Signal Integrity & Power Integrity Engineer with strong experience in semiconductor / IC packaging, package or substrate design, high-speed interconnects, and SI/PI analysis. The role will work closely with Mandarin-speaking stakeholders and engineering teams to deliver high-quality package and system-level solutions.

Key Responsibilities

• Perform Signal Integrity (SI) and Power Integrity (PI) analysis for semiconductor packages, substrates, boards, and high-speed interconnects.
• Support package design and package-board / chip-package-board co-design activities.
• Analyze high-speed interfaces including DDR, PCIe, Ethernet, SerDes, and other high-speed I/O technologies.
• Conduct eye diagram and jitter analysis, crosstalk assessment, impedance discontinuity analysis, and signal loss evaluation.
• Perform Power Delivery Network (PDN) and Power Integrity analysis to identify and resolve power delivery issues.
• Develop and use simulation models including IBIS, IBIS-AMI, and S-parameters for channel and system-level analysis.
• Perform S-parameter extraction and channel simulation/modeling for high-speed interconnects.
• Collaborate with package, substrate, board, architecture, design, and validation teams to identify design risks and drive solutions.
• Use industry-standard SI/PI simulation and electromagnetic analysis tools to evaluate and optimize designs.
• Communicate technical findings, recommendations, and design trade-offs to engineering stakeholders and Mandarin-speaking teams.

Key Requirements

• 5+ years of relevant engineering experience.
• Mandatory: Mandarin-speaking ability, with the ability to communicate effectively with Mandarin-speaking stakeholders and engineering teams.
• Relevant experience in semiconductor packaging, Signal Integrity (SI), Power Integrity (PI), package design, substrate design, high-speed interconnects, or related engineering disciplines.
• Hands-on experience in SI/PI simulation, analysis, and troubleshooting.
• Strong understanding of high-speed interfaces such as DDR, PCIe, Ethernet, and/or SerDes.
• Practical experience with eye diagrams, jitter, crosstalk, impedance discontinuities, signal loss, and PDN analysis.
• Experience with IBIS / IBIS-AMI and S-parameter modeling or extraction.
• Experience with at least one major SI/PI simulation tool such as Ansys HFSS, Ansys SIwave, Cadence Sigrity, Keysight ADS, or HyperLynx.

Preferred Qualifications

• Experience with chip-package-board co-design and system-level SI/PI.
• Exposure to 2.5D / 3D IC packaging or advanced packaging technologies.
• Experience with Python and/or TCL for engineering analysis, automation, or scripting.
• Experience in EDA or semiconductor companies, particularly in SI/PI, packaging, package design, or high speed interconnect engineering.

WHAT’S ON OFFER:

You will be remunerated with an excellent base salary and entitled to attractive company benefits. Additionally, you will get the opportunity to enjoy a fun and collaborative work environment, alongside a strong career progression.

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