Senior PCIe IP Verification Architect

Advanced Micro Devices, Inc.; Bayan Lepas; On-site; MYR 120,000 - 192,000; Full time

Job summary

AMD in Penang, Malaysia invites an experienced ASIC/SOC verification engineer to join the PCIe SubSystem team. You will develop and maintain infrastructure for IP-level verification and work with Design and Architecture to create new verification components.

You will own the verification plan for PCIe SS IP features, manage verification closure, and contribute to high-performance interconnect IP used across AMD products.

Qualifications

• 8+ years in digital ASIC/SoC design verification.
• Strong testbench architecture experience.
• Proficient in UVM, SystemVerilog and Verilog.
• PCIe knowledge is preferred.

Responsibilities

• Develop and update infrastructure and environment for IP level design verification.
• Collaborate with Design and Architecture teams to develop new verification components.
• Define verification plans for PCIe SS IP features and drive closure.

Skills

UVM

SystemVerilog

Verilog

Education

MSEE

BSEE

Tools

PCIe

Serdes PHY

Testbench Architecture

Job description

AMD in Penang, Malaysia invites an experienced ASIC/SOC verification engineer to join the PCIe SubSystem team. You will develop and maintain infrastructure for IP-level verification and work with Design and Architecture to create new verification components.

You will own the verification plan for PCIe SS IP features, manage verification closure, and contribute to high-performance interconnect IP used across AMD products.