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AMD is seeking a Front-End silicon design engineer in Penang, Malaysia, to work within the AECG ASIC/Custom silicon team. You will translate chip specifications into RTL, integrate IPs, and drive front-end design across multi-clock domains with SystemVerilog, VHDL, and Verilog.
The role requires hands-on RTL coding, experience with clocking and power management, and a focus on bug-free, synthesizable code. A hybrid work setup in Penang is offered with collaboration across firmware and software
AMD is seeking a Front-End silicon design engineer in Penang, Malaysia, to work within the AECG ASIC/Custom silicon team. You will translate chip specifications into RTL, integrate IPs, and drive front-end design across multi-clock domains with SystemVerilog, VHDL, and Verilog.
The role requires hands-on RTL coding, experience with clocking and power management, and a focus on bug-free, synthesizable code. A hybrid work setup in Penang is offered with collaboration across firmware and software