Senior Front-End ASIC RTL Engineer for Cutting-Edge SoCs

AMD

Malaysia

Hybrid

MYR 120,000 - 180,000

Full time

6 days ago
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Benefits offered by this job

AMD benefits at a glance
Hybrid work arrangement

Job summary

AMD is seeking a Front-End silicon design engineer in Penang, Malaysia, to work within the AECG ASIC/Custom silicon team. You will translate chip specifications into RTL, integrate IPs, and drive front-end design across multi-clock domains with SystemVerilog, VHDL, and Verilog.

The role requires hands-on RTL coding, experience with clocking and power management, and a focus on bug-free, synthesizable code. A hybrid work setup in Penang is offered with collaboration across firmware and software

Qualifications

  • Hands on RTL coding, including IP RTL integration.
  • Strong SOC clocking, reset, boot and power management understanding.
  • Experience with CDC, Lint, VCLP, LEC quality checks.

Responsibilities

  • Convert chip spec to RTL using internal and external IPs.
  • Plan and deliver IP level RTL, implement front-end RTL integration.
  • Define and debug SDC timing constraints and SystemVerilog test benches.
  • Create readable Verilog RTL and SV assertions for coverage improvement.
  • Participate in post-silicon functional and performance debugging.

Skills

RTL Verilog
VHDL
SystemVerilog
Scripting (Python)
Scripting (Perl)
Shell scripting
Spyglass
Synthesis/LEC flow
SDC timing constraints
Independent work

Education

Bachelor's or Master's in Computer/Electrical Engineering

Tools

Spyglass
Synthesis tools

Job description

AMD is seeking a Front-End silicon design engineer in Penang, Malaysia, to work within the AECG ASIC/Custom silicon team. You will translate chip specifications into RTL, integrate IPs, and drive front-end design across multi-clock domains with SystemVerilog, VHDL, and Verilog.

The role requires hands-on RTL coding, experience with clocking and power management, and a focus on bug-free, synthesizable code. A hybrid work setup in Penang is offered with collaboration across firmware and software

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