Senior FPGA QA Engineer: HDL & GUI Testing, Automation

Lattice Semiconductor; Penang; On-site; MYR 120,000 - 180,000; Full time

Job summary

Lattice Semiconductor in Malaysia (Penang) seeks a highly skilled Senior Software QA Test Engineer to join our dynamic team. The ideal candidate will possess extensive software quality assurance experience and a solid understanding of HDL design and verification methodologies.

The role involves validating FPGA design tools, GUI workflow and design compilation flow to ensure high‑quality customer experiences.

Qualifications

• Minimum 8 years of experience in software quality assurance, validation or testing.
• Proficient in Verilog, System Verilog and VHDL.
• Hands-on experience with scripting language such as Python and Tcl for test development and automation.
• Familiarizing with GUI testing platforms and tools such as Squish is highly desirable.
• Experience with software test automation, regression testing and continuous integration methodologies is a plus.

Responsibilities

• Validate FPGA compilation design across both GUI and Tcl-based environments.
• Develop, maintain and enhance test plans for software verification and validation.
• Design, implement and execute test cases for functional, integration, regression and performance testing of the Radiant software platform.
• Analyze test coverage metrics and continues to improve test scenarios to achieve quality objectives.
• Investigate, reproduce, and document software defects and work with development teams to drive time resolution.
• Review, collaborate and analyze feature requirements with stakeholders.
• Contribute to test automation initiatives using AI, scripting languages and GUI automation frameworks.

Education

Bachelor’s or Master’s degree in electronic engineering, Computer Science, Software Engineering, or related fields

Tools

Verilog

SystemVerilog

VHDL

Python

Tcl

Squish

Job description

Lattice Semiconductor in Malaysia (Penang) seeks a highly skilled Senior Software QA Test Engineer to join our dynamic team. The ideal candidate will possess extensive software quality assurance experience and a solid understanding of HDL design and verification methodologies.

The role involves validating FPGA design tools, GUI workflow and design compilation flow to ensure high‑quality customer experiences.