Library Characterization Engineer (for Advanced Digital Libraries)

Sinergia Talents; Kuching; On-site; MYR 89,000 - 167,000; Full time

Benefits offered by this job

Free parking

Health insurance

Maternity leave

Job summary

Sinergia Talents in Kuching, Malaysia, seeks a Library Characterization Engineer to drive digit library characterization, SPICE modeling, and PPA optimization for automotive applications.

The role involves developing characterization flows, collaborating with a global team, ensuring quality, and releasing libraries to customer portals. Full-time on-site with benefits including health insurance and parking; salary RM 8,000–15,000 per month.

Qualifications

• Bachelor's degree in Electronics Engineering or higher.
• At least 2 years in digital design and library characterization using SPICE, Liberate, or STA tools.
• Strong knowledge of standard cells, PPA optimization, and digital circuit modeling.

Responsibilities

• Develop and refine library characterization production flows focused on timing and power.
• Validate liberty models and implement automated QA flows (EM/IR, design checks).
• Collaborate with the digital library team to support advanced circuit design and modeling.
• Explore innovative modeling techniques for variation, layout effects, aging, and SS changes.
• Oversee library release to customer portals and ensure industry-standard adherence.
• Collaborate with a globally distributed team to achieve common goals.

Skills

Digital design experience

Library characterization

SPICE modelling

Static timing analysis

PPA optimization

Scripting (TCL/Perl/Python)

Education

Bachelor's degree or higher in Electronics Engineering

Tools

Liberate

PrimeTime

Tempus

SPICE

Job description

Library Characterization Engineer (for Advanced Digital Libraries)

Kuching, Sarawak, Malaysia

RM 8,000.00 - 15,000.00 (Malaysian Ringgit)

Job Openings Library Characterization Engineer (for Advanced Digital Libraries)

About the job Library Characterization Engineer (for Advanced Digital Libraries)

Job Description:

We are seeking a Library Characterization Engineer to join our team, responsible for the characterization of standard and custom cell libraries, and the generation of the latest library formats using cutting-edge tools and methodologies. As part of our team, you will contribute to developing state-of-the-art digital libraries optimized for power, performance, and area (PPA), primarily for the automotive market.

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Your Role:

• Library Characterization: Develop and refine best-in-class library characterization production flows to meet advanced customer requirements. Focus on timing and power characterization, and generate standard cell EDA views by implementing and maintaining advanced silicon modeling methodologies.
• Quality Assurance: Ensure the First Time Right of IC Designs by delivering high-quality library outputs. Validate the accuracy of liberty models and develop automated QA flows, including EM/IR and design checks.
• Collaboration: Work closely with the digital library team to support advanced circuit design and modeling, pushing the boundaries of PPA. Provide customer support for Static Timing Analysis and Signoff condition recommendations.
• Innovation: Explore and implement innovative modeling techniques to address variation, layout-dependent effects, aging, simultaneous switching, and other advanced phenomena.
• Library Release: Oversee the release of digital libraries on our customer portal, ensuring adherence to industry standards.
• Global Teamwork: Collaborate with a globally distributed team of experts to achieve common goals.

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Your Profile:

• Education: Bachelors Degree or higher in Electronics Engineering.
• Experience: Minimum 2 years of experience in digital design activities, ideally in library characterization using SPICE, internal tools, or commercial tools such as Liberate and static timing analysis tools like PrimeTime or Tempus.
• Technical Skills:
  • In-depth understanding of digital standard cells, digital circuits, and optimization for best PPA.
  • Proficiency in Timing/Power characterization and modeling of standard cell circuits.
  • Familiarity with industry-standard hardware design CAD software and the generation and validation of standard cell design views.
  • Expertise in Liberty format (NLDM, CCS, CCSN) and transistor-level SPICE simulation.
  • Hands-on experience with SPICE simulations and high sigma variation analysis.
  • Knowledge of static timing, power, and EMIR analysis using EDA tools.
  • Proficiency in scripting languages such as TCL, Perl, Python, and/or Shell is a plus.
  • Good layout design knowledge and parasitic optimization in various types of layouts.
• Strong communication skills, with proficiency in English, both written and spoken.
• Effective teamwork and collaboration skills, especially within multinational, multisite teams.
• Open-mindedness, curiosity in new design implementations, integrity, and friendliness in engaging internal and external customers.
• Self-motivated, with a progressive attitude and the ability to work independently with minimal supervision.

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Job Type: Full-time,Permanent

• Free parking
• Health insurance
• Maternity leave

Schedule:

• Fixed shift
• Monday to Friday

Supplemental pay types:

• Performance bonus
• Yearly bonus

Ability to commute/relocate:

• Kuching: Reliably commute or willing to relocate with an employer-provided relocation package