Lead Design Verification Engineer

Altera Corporation; Penang; On-site; MYR 171,160 - 299,530; Full time

Job summary

Altera Corporation is seeking a Lead Design Verification Engineer to perform functional logic verification of FPGA designs and develop verification plans, test benches, and environments to ensure strong coverage. You will execute plans, run system simulations, analyze timing and debug issues in pre-silicon stages, collaborating with architects and RTL teams.

The role involves maintaining verification infrastructure, reviewing verification strategies, and contributing to continuous improvement

Qualifications

• BS/MS/PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience.
• Experience in Pre Silicon Validation/Verification.
• Proficiency in OVM/UVM, SystemVerilog, constrained random verification methodologies.

Responsibilities

• Performs functional logic verification of an FPGA to meet specifications.
• Develops verification plans, test benches, and verification environment to ensure coverage.
• Executes verification plans and runs system simulation models to verify design.
• Collaborates with FPGA architects, RTL developers, and physical design teams.
• Maintains and improves verification infrastructure and methodology.

Skills

OVM/UVM

SystemVerilog

Constrained random verification

FPGA architecture

IP/SOC verification

Education

BS in Electrical or Computer Science Engineering

MS or PhD in Electrical or Computer Science

Job description

## Lead Design Verification EngineerApplylocations: Regus, Madhapur: Bengaluru, Karnataka, Indiatime type: Full timeposted on: Posted Todayjob requisition id: R02515# **Job Details:**### ## **Job Description:**Performs functional logic verification of an FPGA to ensure design will meet specification requirements. Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. May also collaborate with systems and software engineers to support integration testing of the FPGA. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e.g., gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications.### ## **Qualifications:**Minimum Qualification:• Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience. • Related technical experience should be in/with: Pre Silicon Validation/Verification. • OVM/UVM, System Verilog, constrained random verification methodologies.Preferred Qualification:• Design Verification with developing, maintaining, and executing complex IPs and/or SOCs. • The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). • Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. • Experience in FPGA architecture or FPGA prototyping### ## **Job Type:**Regular### ## **Shift:**Shift 1 (India)### ## **Primary Location:**Regus, Madhapur### ## **Additional Locations:**Bengaluru, Karnataka, India, Penang 15, Penang, Malaysia### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.**About Altera**Altera: Accelerating InnovatorsAltera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.