Lead Analog/Mixed-Signal IC Layout Engineer

UST Malaysia; Bayan Lepas; On-site; MYR 180,000 - 240,000; Full time

Job summary

UST Malaysia in Penang is seeking an experienced layout engineer to lead analog/mixed-signal IC layout activities. You'll collaborate with circuit designers to translate requirements into robust layouts and plan schedules to meet project milestones.

You will perform floorplanning, placement, routing, and DRC/LVS checks, mentor junior engineers, and interface with foundry partners to ensure compliance with process design rules.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 8+ years of analog/mixed-signal IC layout design experience.
• Proficient with Cadence Virtuoso and Mentor Graphics.
• Strong understanding of layout sensitivities (matching, parasitics, noise).
• Experience mentoring and leading layout teams is a plus.
• Willing to work at Bayan Lepas, Penang.

Responsibilities

• Lead and execute layout design of analog, digital, and mixed-signal circuits.
• Collaborate with circuit designers to meet requirements and performance targets.
• Plan and manage layout schedules, resources, and deliverables.
• Perform floorplanning, placement, and routing with optimization for area and manufacturability.
• Conduct DRC, LVS, ERC checks including RV.
• Mentor junior layout engineers and drive design reviews with foundry partners.

Skills

Analog/mixed-signal layout

Mentoring

Cross-functional collaboration

Education

Bachelor’s or Master’s degree in Electrical Engineering or Microelectronics

Tools

Cadence Virtuoso

Mentor Graphics

Job description

UST Malaysia in Penang is seeking an experienced layout engineer to lead analog/mixed-signal IC layout activities. You'll collaborate with circuit designers to translate requirements into robust layouts and plan schedules to meet project milestones.

You will perform floorplanning, placement, routing, and DRC/LVS checks, mentor junior engineers, and interface with foundry partners to ensure compliance with process design rules.