Design For Test (DFT) Verification Engineer

DFStar Technology Sdn Bhd; Bayan Lepas; On-site; MYR 90,000 - 150,000; Full time

Job summary

DFStar Technology Sdn Bhd in Malaysia is seeking an IC/DFT design engineer to join our design team and craft test plans for diverse DFT areas including JTAG, P1500, P1687, DFT clocking, and MBIST.

You will develop cutting-edge tests in a UVM environment and collaborate with design engineers to discuss bugs and ensure thorough issue resolution.

Qualifications

• Minimum of 2 years of experience in IC design and ASIC flows.
• Strong foundation in design verification concepts and environments.
• Proficiency in EDA tools.
• Knowledgeable in DFT subject matter.
• Degree in Electrical Engineering or a related field.

Responsibilities

• Craft innovative test plans for diverse DFT areas, including JTAG, TAP, P1500, P1687, DFT clocking, Scan, MBIST, BScan, or PHY DFT.
• Develop cutting-edge tests within a UVM environment.
• Facilitate discussions on bugs or sightings with design engineers and team leads.
• Ensure thorough resolution of issues.

Skills

IC design

Design verification

DFT knowledge

UVM / SystemVerilog

ASIC flows

Education

Bachelor's degree in Electrical Engineering or related field

Tools

EDA tools

Job description

Jora Malaysia will close on 16th September 2026. Thank you for being with us, we are cheering you on as you continue your career journey.

Join our dynamic team and collaborate closely with our design engineers to craft innovative test plans for diverse DFT areas, including JTAG, TAP, P1500, P1687, DFT clocking, Scan, MBIST, BScan, or PHY DFT. You'll have the opportunity to develop cutting-edge tests within a UVM environment and facilitate discussions on bugs or sightings with design engineers and team leads, ensuring thorough resolution of any issues. Depending on your experience and interests, you may focus on one or multiple exciting DFT areas.

Key responsibilities

• Craft innovative test plans for diverse DFT areas, including JTAG, TAP, P1500, P1687, DFT clocking, Scan, MBIST, BScan, or PHY DFT
• Develop cutting-edge tests within a UVM environment
• Facilitate discussions on bugs or sightings with design engineers and team leads
• Ensure thorough resolution of issues

About you

• Minimum of 2 years of experience in IC design and ASIC flows
• Strong foundation in design verification concepts and environments
• Proficiency in EDA tools
• Knowledgeable in DFT subject matter
• Degree in Electrical Engineering or a related field