Staff Emulation Build Quality, Performance & Debug Engineer

Qualcomm

Tijuana

On-site

MXN 900,000 - 1,200,000

Full time

2 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA seeks an experienced engineer to drive pre-silicon emulation platforms for SoC programs. You will work with architects, designers, verification engineers, and software teams to optimize build quality and debug productivity.

The role requires strong HDL skills (Verilog/SystemVerilog), C/Python scripting, and FPGA prototyping know-how, with emphasis on performance and reliability across emulation platforms.

Qualifications

  • Bachelor's degree in Science, Engineering, or related field with 4+ years of ASIC design/verification experience.
  • Master's degree in Science, Engineering, or related field with 3+ years of ASIC design/verification experience.
  • PhD in Science, Engineering, or related field with 2+ years of ASIC design/verification experience.

Responsibilities

  • Develop and support pre-silicon emulation platforms for SoC programs.
  • Improve build performance, reliability, and debug efficiency across emulation environments.
  • Collaborate across architecture, design, verification, software and CAD teams to drive root-cause analysis and corrective actions.

Skills

ASIC design
Verification
SystemVerilog
Verilog
Python
C programming
Debugging
Troubleshooting

Education

Bachelor's degree in Science, Engineering, or related field
Master's degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field

Tools

FPGA Prototyping tools
Xilinx FPGAs
Intel FPGAs
Synthesis
Place and Route
Clocking

Job description

Company:

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. Qualcomm's Emulation Team is part of the central SoC digital hardware organization responsible for the overall development and support of SoC pre-silicon platforms. The Emulation team works closely with architects, designers, verification engineers, software engineers, and customers. The Emulation Performance, Quality, and Debug team is responsible for improving the efficiency, scalability, quality, and reliability of Qualcomm's pre-silicon emulation platforms. The team drives emulation build performance optimization, root-cause analysis of complex hardware and software issues, and development of methodologies that improve build quality and debug productivity across multiple SoC programs.

Minimum Requirements:

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Requirements:

7+ years of experience working in emulation and silicon environments.

Technical Disciplines, Languages, and Methodologies:
  • Emulation Platforms (FPGA Prototyping, Veloce, Palladium), Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure), Build Performance Analysis, Build Quality Improvement, System Debug (Waveform generation and Content Debug support)
  • SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols)
Preferred Qualifications:
  • Design, development, and deployment of uniform global methodologies for emulation build generation and debug across FPGA based emulation platforms of various configurations
  • Driving emulation build performance improvements through analysis, optimization, automation, and methodology development
  • Cross-site collaboration, vendor engagements, and executive communication
  • Working independently to drive complex technical initiatives from problem identification through deployment of scalable solutions
  • Collaboration across architecture, design, verification, software, CAD, and system teams to drive root-cause analysis and long-term corrective actions
  • Mentoring and guiding junior engineers while providing technical leadership across projects and teams
  • Pre-silicon prototyping for new SoC designs, including pre-silicon enablement and bring-up
  • Bring-up of new FPGA emulation/prototyping hardware and software
  • Debugging low level software and hardware issues
  • Leading complex debug efforts involving emulation infrastructure, hardware design, software, and FPGA implementation issues
  • Debug tools including JTAG and kernel debuggers
  • Validation and debug of digital circuits
  • Root-cause analysis of build failures, timing issues, clocking issues, and functional failures across emulation platforms
  • CPU and SoC architectures, with solid understanding of SoC building blocks (interconnects, power management, PMIC, NoC, peripherals)
  • Basic understanding of power and performance
  • Expertise in Verilog / SystemVerilog
  • Experience with C programming
  • Scripting: Proficient in Python, TCL
  • FPGA Expertise: Xilinx/Intel FPGAs, Tools, and timing closure techniques
  • Development of metrics, infrastructure, and methodologies to improve emulation build quality, runtime performance, and debug efficiency
  • Ability to independently identify technical gaps, propose innovative solutions, and drive adoption across multiple engineering teams
Minimum Qualifications:
  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Staff Emulation Build Quality, Performance & Debug Engineer
Staff Emulation Build Quality, Performance & Debug Engineer

QUALCOMM, Inc. • Tijuana

On-site
MXN 2,172,000 - 3,258,000
Staff Emulation Build Quality, Performance & Debug Engineer
Staff Emulation Build Quality, Performance & Debug Engineer

MaC VC • Tijuana

On-site
MXN 900,000 - 1,300,000
Senior Emulation Performance Methodology & Debug Engineer
Senior Emulation Performance Methodology & Debug Engineer

QUALCOMM, Inc. • Tijuana

On-site
MXN 600,000 - 900,000
Senior Emulation Performance Methodology & Debug Engineer
Senior Emulation Performance Methodology & Debug Engineer

Qualcomm • Tijuana

On-site
MXN 700,000 - 1,100,000
Emulation Performance Methodology & Debug Engineer
Emulation Performance Methodology & Debug Engineer

QUALCOMM, Inc. • Tijuana

On-site
MXN 480,000 - 640,000
SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff
SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff

QUALCOMM, Inc. • Tijuana

On-site
MXN 600,000 - 1,200,000
SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff
SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff

Qualcomm Incorporated • Tijuana

On-site
MXN 900,000 - 1,300,000
System Validation Engineer (AI Accelerator Platform)
System Validation Engineer (AI Accelerator Platform)

QUALCOMM, Inc. • Tijuana

On-site
MXN 900,000 - 1,500,000
Emulation Performance Methodology & Debug Engineer Tijuana, Baja California, Mexico ASICS Engineering
Emulation Performance Methodology & Debug Engineer Tijuana, Baja California, Mexico ASICS Engineering

QUALCOMM, Inc. • Tijuana, Chihuahua

On-site
MXN 1,285,000 - 1,836,000
Validation Engineer - Staff
Validation Engineer - Staff

QUALCOMM, Inc. • Tijuana

On-site
MXN 420,000 - 660,000