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QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA seeks an experienced engineer to drive pre-silicon emulation platforms for SoC programs. You will work with architects, designers, verification engineers, and software teams to optimize build quality and debug productivity.
The role requires strong HDL skills (Verilog/SystemVerilog), C/Python scripting, and FPGA prototyping know-how, with emphasis on performance and reliability across emulation platforms.
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA
Engineering Group, Engineering Group > ASICS Engineering
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. Qualcomm's Emulation Team is part of the central SoC digital hardware organization responsible for the overall development and support of SoC pre-silicon platforms. The Emulation team works closely with architects, designers, verification engineers, software engineers, and customers. The Emulation Performance, Quality, and Debug team is responsible for improving the efficiency, scalability, quality, and reliability of Qualcomm's pre-silicon emulation platforms. The team drives emulation build performance optimization, root-cause analysis of complex hardware and software issues, and development of methodologies that improve build quality and debug productivity across multiple SoC programs.
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
7+ years of experience working in emulation and silicon environments.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
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