Layout Design Engineer

Intel; Región Centro; Presencial; MXN 200,000 - 400,000; Jornada completa

Descripción de la vacante

A leading semiconductor company in Mexico is seeking a college graduate for custom physical layout design of analog and mixed-signal circuits in CMOS technology. Responsibilities include creating optimized layouts, collaborating with designers, and utilizing EDA tools. A Bachelor's degree in electrical engineering and relevant experience is required. On-site presence is mandatory.

Formación

• 6+ months of experience with EDA tools, DRC/LVS, and CMOS process.
• 2+ years of experience with device-level CMOS analog/memory custom layout design.
• Scripting skills for automation (Python, SKILL).

Responsabilidades

• Plan, design, and validate highly customized physical layouts.
• Collaborate with circuit designers to meet functional specs.
• Leverage best-known methods for high-quality layouts.

Conocimientos

EDA tools

DRC/LVS

CMOS process

Unix environment

Python

SKILL

Educación

Bachelor's degree in electrical engineering or related field

Herramientas

Virtuoso XL

ICC

Fusion compilers

Berkely Analog Generator

Descripción del empleo

Overview

Designs and optimizes custom physical layouts for analog, mixed-signal, and memory circuits in CMOS technology, ensuring performance, area, and reliability goals are met.

Responsibilities

• Plan, design, and validate highly customized physical layouts using Virtuoso XL.
• Collaborate with circuit designers to meet functional and performance specs.
• Leverage best-known methods to create high-quality layouts efficiently.

Qualifications

Minimum qualifications are required to be initially considered for this position.

• Bachelor's degree in electrical engineering or related field.
• 6+ months of experience working with any of the following: EDA tools, DRC/LVS, and CMOS process; design hierarchy, hierarchical layout integration, using fill to meet design rules in a block, and layout floorplan; basic integrated circuit operation; Unix environment.

Must have unrestricted - permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• 2+ years of experience working with device-level CMOS analog/memory custom layout design. Experience with advanced process nodes.
• ICC, Fusion compilers, and ICWBEV+
• Scripting skills (Python, SKILL) for automation.
• Berkely Analog Generator.
• Knowledge of VLSI design.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.

Job Type: College Grad  Shift: Shift 1 (Mexico)  Primary Location: Mexico, Guadalajara  Additional Locations:

Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from multi-node semiconductor process development and global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role: This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.