Analog IC Layout Engineer

NXP Semiconductors; Región Centro; Hybrid; MXN 1,292,000 - 2,030,000; Full time

Job summary

NXP Semiconductors, Guadalajara, Mexico, seeks an Analog IC Layout Engineer to join the Central Layout Group within the Power & Energy Business Line. The role focuses on analog/mixed-signal layout development from schematic to tape-out and cross-functional collaboration.

You will develop layouts, support floorplanning, and optimize for performance, matching, reliability, and manufacturability in an international environment with automotive semiconductor development exposure.

Qualifications

• Bachelor or Master degree in Electrical Engineering, Electronics, Physics or Microelectronics.
• Knowledge of Analog IC Layout methodologies.
• Experience with Cadence Virtuoso Layout environment.
• Understanding of DRC/LVS verification concepts.
• Familiarity with Linux working environments.
• Strong analytical and problem-solving skills.
• Ability to collaborate effectively in multicultural and international teams.
• Fluent written and spoken English.

Responsibilities

• Develop Analog and Mixed-Signal layout blocks from schematic to tape-out.
• Support floorplanning and physical implementation activities.
• Optimize layouts for performance, matching, reliability and manufacturability.
• Contribute to top-level integration activities.
• Execute DRC, LVS, ERC and physical verification activities.
• Participate in design reviews and sign-off activities.
• Collaborate with Analog Design, Verification, Package, Test and Product Engineering teams.

Skills

Analog IC Layout

Cadence Virtuoso

DRC LVS verification

Linux

English fluency

Analytical thinking

Team collaboration

Scripting (Python/TCL)

Education

Bachelor or Master in Electrical Engineering

Tools

Calibre

PVS

Job description

## Analog IC Layout EngineerApply: Guadalajara: Full time: Posted Today: R-10066800**About the Team**NXP Semiconductors is seeking an Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS).The Central Layout Group delivers physical implementation expertise for complex mixed-signal and power management integrated circuits supporting multiple product lines worldwide. The team collaborates with Design, Verification, Package, Test and Product Engineering organizations across a global R&D network to develop next-generation automotive and industrial semiconductor solutions.**Role Summary**The successful candidate will contribute to the development of analog and mixed-signal integrated circuits, supporting physical implementation activities from block-level development through product integration. The role offers the opportunity to work within an international and multidisciplinary engineering environment.**Key Responsibilities:****Layout Development**• Develop Analog and Mixed-Signal layout blocks from schematic to tape-out • Support floorplanning and physical implementation activities • Optimize layouts for performance, matching, reliability and manufacturability • Contribute to top-level integration activities**Verification and Quality**• Execute DRC, LVS, ERC and physical verification activities • Support parasitic extraction and post-layout analysis • Participate in design reviews and sign-off activities • Ensure high-quality layout deliveries following NXP methodologies**Cross-Functional Collaboration**• Collaborate closely with Analog Design, Verification, Package, Test and Product Engineering teams • Support troubleshooting and problem-solving activities during product development • Contribute to continuous improvement of layout methodologies and best practices**Required Skills**• Bachelor or Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics • Knowledge of Analog IC Layout methodologies • Experience with Cadence Virtuoso Layout environment • Understanding of DRC/LVS verification concepts • Familiarity with Linux working environments • Strong analytical and problem-solving skills • Ability to collaborate effectively in multicultural and international teams • Fluent written and spoken English**Preferred Qualifications**• Experience with Calibre, PVS or equivalent verification tools • Knowledge of CMOS, BCD or High Voltage technologies • Knowledge of Analog Mixed-Signal integrated circuits • Basic scripting skills (SKILL, Python, TCL or Shell) • Experience in automotive semiconductor development • Interest in layout automation and methodology improvements