Sr. ASIC Design Engineer

Experteer Italy; Parma; In loco; EUR 40.000 - 70.000; Tempo pieno

Descrizione del lavoro

A leading technology company is seeking a Sr. ASIC Design Engineer in Parma, Italy. The ideal candidate will have a Master's degree in Electrical Engineering and be responsible for developing specifications, designing logic, and participating in chip testing. This full-time position offers a great opportunity to work in the evolving field of Computer Vision and video processing. Applicants should have strong programming skills in Verilog and SystemVerilog, along with knowledge in related areas.

Competenze

• Master’s degree in Electrical Engineering with 0-4 years of experience.
• Strong understanding of Computer architecture and Digital electronics.
• Experience with hardware description languages like Verilog/SystemVerilog.

Mansioni

• Develop micro-architecture specifications for Computer Vision processor.
• Design and implement video compression and computer vision processors in Verilog.
• Participate in chip bring-up and testing.

Conoscenze

Computer architecture

Digital electronics

VLSI/ASIC design

Logic design

Verilog

SystemVerilog

Python

Perl

Design verification

Functional coverage

Formazione

Master’s degree in Electrical Engineering

Descrizione del lavoro

We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer.

Responsibilities:

•Developing micro-architecture specifications for a next generation Computer Vision processor;
•Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog;
•Design integration, logic synthesis, and design optimization for timing, area and power;
•Developing front-end methodologies and tool flows;
•Participating in chip bring-up and testing;

Requirements:

•Master’s degree in Electrical Engineering with 0-4 years of experience;
•Very Good understanding of Computer architecture, Microprocessor, Digital electronics, VLSI/ASIC design, and Logic design;
•Good knowledge and experience in using hardware description languages, like, Verilog/SystemVerilog;
•Ability to program in scripting languages, like Python and Perl;
•Knowledge of design verification, and functional coverage;
•Strong communication skills and a good team player;
•Knowledge is logic synthesis and timing closure are must, and some experience is a plus;
•Knowledge and/or experience in the areas of Image/Video processing, computer vision, machine learning are plus;
To apply, please submit resume with subject: JOB#VLSI to [e-mail] or apply online on Ambarella website.

As an Equal Opportunity/Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants without regard to race, color, national origin, sex, physical disability, or veteran status.

Please find at this link our privacy disclaimer dedicated to candidates data, accordingly to the GDPR: https://tinyurl.com/yd66nbsa

Full time
Posting Date: 2025-02-03