Senior System Safety Engineer

AeroVect

Italia

In loco

EUR 70.000 - 110.000

Tempo pieno

14 giorni+

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Descrizione del lavoro

AeroVect in Italy seeks a Senior Safety Engineer to drive core safety lifecycle tasks across our autonomous software and hardware platforms, under the Head of Safety.

You will perform hazard analyses (HARA, FMEA, FTA, STPA), derive and trace functional safety requirements, collaborate with systems, software, robotics and hardware teams, and support safety case artifacts for deployment.

Competenze

  • Extensive experience performing hazard analyses (HARA, FMEA, FTA, STPA).
  • Proven ability to derive, specify and trace safety requirements (FSRs/TSRs).
  • Experience with hardware safety in automotive/industrial domains is required.

Mansioni

  • Perform quantitative hardware safety analyses (FMEDA, PMHF).
  • Evaluate drive-by-wire compute hardware and sensor suites for faults.
  • Derive hardware safety requirements for redundant architectures.
  • Collaborate with systems, software, robotics, and test teams to verify safety.

Conoscenze

Hazard analysis
Safety lifecycle
Requirements derivation
Cross-functional collaboration
FMEDA
Failure rate modeling

Formazione

B.S. or M.S. in CS/EE/Systems Engineering/Robotics

Strumenti

SN 29500
IEC 61709
MIL-HDBK-217

Descrizione del lavoro

Who We Are

AeroVect is transforming ground handling with autonomy, redefining how airlines and ground service providers around the globe run day-to-day operations. We are a Series A company backed by top-tier venture capital investors in aviation and autonomous driving. Our customers include some of the world’s largest airlines and ground handling providers. For more information, visit www.aerovect.com.

Working under the close guidance and supervision of the Head of Safety, the Senior Safety Engineer will execute core safety lifecycle tasks across AeroVect's software and hardware platforms:

  • System Safety Analysis: Perform hazard identification and risk assessments (HARA, FMEA, FTA, STPA) on the autonomous system architecture and vehicle operation concepts.
  • Requirements Derivation: Derive, specify, and trace functional and technical safety requirements (FSRs / TSRs) for both supervised autonomy (safety driver present) and SDO unsupervised autonomy (driverless).
  • Cross-Functional Execution: Collaborate directly with systems, software, robotics, hardware, and test teams to ensure safety requirements are integrated, testable, and verified.
  • Safety Case Support: Assist in building safety case artifacts and verification evidence required for airport commercial deployment.
You Will
  • Perform Quantitative Hardware Safety Analyses, including FMEDA, hardware diagnostic coverage analysis, and Probabilistic Metric for random Hardware Failures (PMHF).
  • Calculate hardware component and system failure rates using standard methodologies (SN 29500, IEC 61709, MIL-HDBK-217F, Telcordia SR-332).
  • Evaluate drive-by-wire compute hardware, sensor suites (Lidar, Radar, Camera), actuator interfaces, and power distribution systems for single-point and latent faults.
  • Derive Hardware Safety Requirements (HSRs) for redundant architectures and fail-operational compute nodes.
You Have
  • 5+ years of hands-on safety engineering experience in autonomous vehicles, automotive (ISO 26262), aerospace (DO-178C/DO-254), or industrial safety (IEC 61508).
  • 5+ years in hardware safety engineering, EE reliability, or failure rate modeling for automotive, aerospace, or industrial robotics.
  • Prior background working with autonomous driving systems or mobile robotics.
  • Proven ability to work under the technical mentorship of a Principal Safety Engineer in a high-velocity agile engineering team.
  • B.S. or M.S. in Computer Science, Electrical Engineering, Systems Engineering, Robotics, or a related discipline.
  • Proven mastery of FIT rate modeling, component failure rate calculation methods (SN 29500, IEC 61709, MIL-HDBK-217), and FMEDA workflows.
  • ISO 26262-5 Mastery: Deep knowledge of hardware architectural metrics (SPFM, LFM) and hardware diagnostic strategies.
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