Senior Power IC Engineer – PMIC & Mixed-Signal Design

1100 ADI ITALY; Assago; In loco; EUR 70.000 - 100.000; Tempo pieno

Descrizione del lavoro

Analog Devices, Inc. is seeking a Senior Engineer to join the PES team in Milan for Power IP and PMIC development. The role involves defining and designing PMICs, pre- and post-silicon validation, and collaborating with multi-disciplinary teams across locations.

You will engage with customers, contribute to complex PMIC architectures, and drive design milestones while supporting continual learning and process improvements in a dynamic, global engineering environment.

Competenze

• Degree in Electrical Engineering, Computer Science, or Computer Engineering; 3+ years IP Analog Design experience.
• Solid technical and analytical background; strong problem-solving skills.
• Good team worker with multi-disciplinary collaboration.
• Good understanding of Mixed-Signal Design Flow and Top-Down development methodology.
• Good understanding of Power IP Topologies.
• Analog Functional and Parametric Verification across PVT corners; Layout parameter extraction simulations.
• Strong written and verbal communication.

Mansioni

• Power IP Development.
• Contribute to the definition and the design of complex Power IPs.
• Power Management IC Development.
• Execute PMIC design, pre-silicon verification and post-silicon validation.
• Provide guidance to physical design layout team.
• Technical Customer Interface Engagement.
• Participate in customer engagements, in support of technical feasibility.
• IC Development.
• Weekly meetings / IC Milestone Workshops.
• Enable a culture of continuous learning and improvement.
• Support project management, task planning and schedule.

Descrizione del lavoro

Analog Devices, Inc. is seeking a Senior Engineer to join the PES team in Milan for Power IP and PMIC development. The role involves defining and designing PMICs, pre- and post-silicon validation, and collaborating with multi-disciplinary teams across locations.

You will engage with customers, contribute to complex PMIC architectures, and drive design milestones while supporting continual learning and process improvements in a dynamic, global engineering environment.