Senior Digital Design and RISC-V Architecture Engineer

Fondazione Chips-IT; Pavia; Ibrido; EUR 50.000 - 70.000; Tempo pieno

Descrizione del lavoro

A leading research organization in semiconductor design is seeking Senior Researchers to lead R&D on digital processors and RISC-V architectures. The role involves optimizing high-performance, low-power systems and mentoring junior researchers. Ideal candidates should have a Master’s or Ph.D., over 10 years of digital hardware design experience, and proficiency in Verilog/VHDL. Competitive compensation and a hybrid work policy are offered.

Servizi

Competitive compensation

Lunch tickets

Private health care coverage

Structured growth path

Networking opportunities

Competenze

• 10+ years of experience in digital hardware design.
• Deep proficiency in digital design toolchains for synthesis, simulation, and verification.
• Experience with tape-outs and chip bring-up in advanced technology nodes.

Mansioni

• Lead R&D activities in digital design, processors, and SoCs.
• Define architecture and verification of complex digital subsystems.
• Mentor junior researchers across multiple projects.

Conoscenze

Digital hardware design

RISC-V architecture

Hardware description languages (Verilog, VHDL)

FPGA / ASIC design flows

Formazione

Master's or Ph.D. in Electrical Engineering or Computer Engineering

Descrizione del lavoro

Role

The Chips-IT Foundation is seeking Senior Researchers to lead and contribute to cutting-edge research and development initiatives centered on digital design and RISC-V architectures. The project focuses on the development of advanced digital processors, accelerators, and custom SoCs based on the RISC-V instruction set architecture (ISA), as well as domain-specific hardware accelerators.

This role involves leading the design, optimization, and verification of high-performance, low-power digital systems for next-generation computing platforms, IoT, and embedded applications. Senior Researchers will play a key role in defining design methodologies, driving innovation in hardware-software co-design, and contributing to the advancement of the RISC-V ecosystem at both technical and strategic levels. Work can be carried out in either Pavia or Bologna.

Key Responsibilities :

1. Lead research and development activities in digital design, including processors, accelerators, and SoCs based on RISC-V architecture.
2. Define and guide the architecture, design, implementation, and verification of complex digital subsystems (Processors, Accelerators, Memory and Communication Subsystems, etc.).
3. Supervise and mentor junior researchers, including Master’s and PhD students, across multiple research and development projects.
4. Develop and disseminate research outcomes through publications in high-impact scientific journals and presentations at leading international conferences.
5. Drive the adoption of emerging methodologies in digital design, verification, and hardware/software co-design.
6. Collaborate with industry and academic partners, contributing technical leadership and vision to multi-stakeholder projects.
7. Support the development of project proposals and strategic R&D initiatives aligned with national and international funding opportunities.

Required Qualifications :

• Master’s or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field with a strong focus on digital design and processor architectures (Mandatory).
• At least 10 years of experience in digital hardware design, preferably with a mix of academic and industrial exposure.
• Deep proficiency in hardware description languages (Verilog, VHDL) and digital design toolchains for synthesis, simulation, and verification (Mandatory).
• Extensive experience with RISC-V architecture, including custom ISA extensions, microarchitecture design, and hardware-software co-design.
• Hands-on experience with tape-outs and chip bring-up in advanced CMOS / FinFET technology nodes (28nm, 16nm, or below).
• Proven knowledge in FPGA / ASIC design flows, integration of complex SoCs, and system-level verification.

What we offer

• Competitive compensation and contract type, to be negotiated based on qualifications and experience
• Lunch tickets
• Private health care coverage depending on your role and contract
• Structured growth path, with ongoing access to training and updates
• Networking opportunities with industry-leading professionals
• International environment
• Hybrid work policy
• Tax deductions: Candidates from abroad, including Italian citizens who have carried out scientific research activity abroad and meet specific requirements, may be entitled to a taxable income deduction up to 90% for a period of 6 to 13 years

About Fondazione Chips-IT

The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.

The Foundation is Italy's first RTO (Research and Technology Organization) focused on semiconductor research and is a center of excellence in frontier research on semiconductor design, as well as a key part of the Italian semiconductor ecosystem.

Missions of the Foundation :

• Promote the design and development of integrated circuits
• Strengthen professional training in microelectronics
• Establish a network of universities, research centers, and enterprises to foster innovation and technology transfer

Disclaimer

No ranking list or list of suitable candidates will be published. The Foundation reserves the right to:

• Extend or reopen the deadline;
• Revoke this notice;
• Not select any candidates if they do not meet the requirements;

Application process is non-binding and the Foundation's decisions are final.