Attiva gli avvisi di lavoro via e-mail!

Senior Analog IC Design Engineer

JR Italy

Asti

Remoto

EUR 60.000 - 100.000

Tempo pieno

15 giorni fa

Aumenta le tue possibilità di ottenere un colloquio

Crea un curriculum personalizzato per un lavoro specifico per avere più probabilità di riuscita.

Descrizione del lavoro

A forward-thinking technology company is seeking a Senior Analog IC Design Engineer to lead the development of high-speed Phase Locked Loops and integrated power management solutions. This role offers the chance to work on cutting-edge technologies in energy-efficient interconnects and collaborate with diverse teams on complex mixed-signal integration. The ideal candidate will have a proven track record in PLL design and a strong foundation in CMOS analog design. With the possibility of remote work, this position is perfect for those looking to innovate in a collaborative environment.

Competenze

  • Experience in PLL and power management design at 12nm nodes.
  • Strong background in CMOS analog design fundamentals.

Mansioni

  • Design and develop high-speed PLLs (10 GHz and above).
  • Implement on-chip power management circuits such as LDOs and DACs.

Conoscenze

PLL Design
Power Management Design
CMOS Analog Design
Problem Solving

Strumenti

Cadence
Spectre

Descrizione del lavoro

Social network you want to login/join with:

I am recruiting for a Senior Analog IC Design Engineer on behalf of my client, a growing technology company developing next-generation solutions for high-performance data communication. The position is focused on high-speed Phase Locked Loop design and integrated power management within advanced CMOS nodes.

The Senior Analog IC Design Engineer will contribute to cutting-edge developments in energy-efficient interconnects.

Key responsibilities:

  • Design and develop high-speed PLLs (10 GHz and above)
  • Implement on-chip power management circuits such as LDOs and DACs
  • Collaborate closely with digital, systems and photonic teams on complex mixed signal integration
  • Run simulations, oversee layout and verify performance of analog building blocks
  • Bring industry trends and design innovations into the development cycle

Required experience:

  • Proven track record in PLL and power management design, ideally at or near 12nm nodes
  • Strong background in CMOS analog design fundamentals
  • Proficient with tools like Cadence and Spectre
  • Detail oriented with excellent problem solving skills

To be considered for this opportunity, you will need to have experience in high-speed designs.

This is an excellent opportunity for a Senior Analog IC Design Engineer looking to work on novel technologies in a collaborative and forward-looking environment.

Remote working may be possible for the right candidate, although Italy is preferred.

Ottieni la revisione del curriculum gratis e riservata.
oppure trascina qui un file PDF, DOC, DOCX, ODT o PAGES di non oltre 5 MB.