R&D – Head of Embedded NVM Technologies

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R&D – Head of Embedded NVM Technologies, Ascoli Piceno

Client: Theron Solutions

Location: Ascoli Piceno, Italy

Job Category: Other

EU work permit required: Yes

Job Reference: 4287033516446711808337161

Job Views: 2

Posted: 26.04.2025

Expiry Date: 10.06.2025

Job Description:

THIS ROLE REQUIRES A RELOCATION TO DHOLERA, INDIA once the FAB is built.

Responsibilities:

1. Integration responsibilities to add eNVM (embedded Non Volatile Memory) Features to 28 110nm platform technologies including MTP and Flash. Work with IP providers, as needed, to implement these features.
2. Design and layout of test chips to aid in device/technology optimization, reliability assessment, and SPICE model extraction.
3. End-to-end project management from initial project justification to final qualification and yield ramp, with responsibilities for achieving desired performance, quality/yield, schedule, and cost targets.
4. Build and lead a cross-functional team across diverse geographies.
5. Build strong customer relationships based on confidence in the company's technical capabilities.
6. Conduct competitor benchmarking; own the technology roadmap.
7. Present to internal and customer senior executives.
8. Possible involvement in OTP development.
9. Travel (a few weeks per quarter).

Additional qualities:

• Ability to manage, mentor, and lead a team of highly motivated professionals.
• Able to work independently, self-motivated with a strong drive to succeed.
• Team player with the ability to work across diverse cross-functional teams worldwide.
• Leadership skills to influence all levels of the organization.
• Inclusive, adaptable to different situations and global norms.
• Curious and resilient learner, seeking data to build understanding.
• Collaborative, supportive, and open to new approaches.
• Innovative, proactive in exploring new ideas, and adaptable to change.

Qualifications:

1. M.S or PhD in Electrical Engineering, Materials Science, or equivalent.
2. Strong understanding of CMOS and eNVM device physics, process modules, yield improvement, failure mechanisms, and analytical techniques.
3. Deep understanding of key eNVM technologies (charge trap, floating gate, RRAM, MRAM, etc.).
4. Knowledge of technology parameters and figures of merit (bit cell size, macro size, endurance, retention, power, latency, mask count, etc.); experience in achieving competitive performance.
5. Proven track record of delivering these technologies into volume manufacturing.
6. Ability to lead cross-functional teams and meet project timelines and budgets.
7. Ability to work across cultures and geographies.
8. Good team player.
9. Innovation and competitive mindset.

Desired Experience Level:

1. 15+ years of experience in the semiconductor industry.
2. Proven success in developing new technologies into high-volume production.
3. Strong problem-solving skills using design of experiments and analytical tools.

EOE:

Our client is an Equal Opportunity Employer, committed to providing a work environment free of discrimination and harassment, based on individual qualifications and without regard to protected characteristics.