Principal Logical Design Engineer

Buscojobs; Toscana; Remoto; EUR 90.000 - 130.000; Tempo pieno

Descrizione del lavoro

A leading technology firm is seeking a Principal Logical Design Engineer to lead the development of high-performance digital subsystems. This remote position in Italy requires over 15 years of experience in silicon logical design and expertise in front-end ASIC design. The ideal candidate will manage multidisciplinary teams to innovate cutting-edge AI hardware solutions.

Competenze

• 15+ years of experience in silicon logical design, with a strong track record of successful tape-outs.
• Deep expertise in front-end ASIC design, including SystemVerilog advanced coding.
• Proficiency in scripting languages (Python, TCL) for automation.

Mansioni

• Partner with architecture teams to define specifications for next-generation silicon components.
• Lead the logical design process from concept to tape-out, ensuring high-quality deliverables.
• Coordinate LD sub-teams, managing dependencies and projects.

Conoscenze

Silicon logical design

SystemVerilog

EDA tools

Problem-solving

Python

Formazione

Advanced degree in Electrical Engineering

Strumenti

EDA tools for design and verification

Descrizione del lavoro

Principal Logical Design Engineer

Remote, anywhere in Italy

About the Role

My Client is looking for an exceptional Principal Logical Design Engineer to play a key leadership role in the development of complex and high-performance digital subsystems. In this role, you will work closely with multidisciplinary teams to define, architect, and implement innovative solutions that drive cutting-edge AI hardware forward.

This is a high-impact position for an experienced engineer who thrives in a fast-paced, collaborative environment and is eager to push the boundaries of silicon design.

Key Responsibilities

• Partner with architecture teams to define specifications and requirements for next-generation silicon components.
• Architect and implement advanced micro-architectures, ensuring optimal performance, power, and area (PPA).
• Lead the logical design process from concept to tape-out, ensuring high-quality deliverables.
• Coordinate Logical Design (LD) sub-teams, managing dependencies and ensuring projects are well-resourced.
• Actively contribute to design reviews, bringing technical expertise to enhance design quality.

Required Skills & Experience

15+ years of experience in silicon logical design, with a strong track record of successful tape-outs.Advanced degree in Electrical Engineering, Computer Engineering, or related field.Deep expertise in front-end ASIC design, including : SystemVerilog advanced coding techniques and best practicesLinting, synthesis, timing analysis, and physical constraintsSVA for design, formal property checkingUnderstanding of DFT (Design for Testability)Development of design flows, best practices, and efficiency guidelinesMastery of EDA tools for design and verification.Proficiency in scripting languages (Python, TCL) for automation.Strong problem-solving, debugging, and analytical skills.

If you have experience of PCIe, UCIe, Ethernet, LPDDR5 / 6 GDDR7, would be beneficial, but not essential.

For more information, please get in touch.

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