Principal Chip Lead

microTECH Global Limited; Italia; Remoto; EUR 70.000 - 120.000; Tempo pieno

Descrizione del lavoro

A leading company is seeking a Principal Logical Design Engineer to drive the development of high-performance digital subsystems. This role involves working collaboratively to design and implement innovative solutions in silicon. Ideal for a seasoned engineer looking to make a significant impact in cutting-edge AI technology. Experience in ASIC design and advanced EDA tools is essential, alongside strong leadership and problem-solving skills.

Competenze

• 15+ years of experience in silicon logical design with a track record of successful tape-outs.
• Deep expertise in front-end ASIC design.</br> Strong experience with DFT (Design for Testability).

Mansioni

• Lead the logical design process from concept to tape-out.
• Partner with architecture teams to define specifications for silicon components.
• Coordinate Logical Design sub-teams and manage dependencies.

Conoscenze

SystemVerilog advanced coding techniques

Linting

Synthesis

Timing analysis

Physical constraints

SVA for design

Debugging

Problem-solving

Analytical skills

Scripting languages (Python, TCL)

Formazione

Advanced degree in Electrical Engineering

Degree in Computer Engineering

Strumenti

EDA tools for design and verification

Descrizione del lavoro

Principal Logical Design Engineer - Chip Lead

Location: Remote, anywhere in Italy

About the Role

My Client is looking for an exceptional Principal Logical Design Engineer to play a key leadership role in the development of complex and high-performance digital subsystems. In this role, you will work closely with multidisciplinary teams to define, architect, and implement innovative solutions that drive cutting-edge AI hardware forward.

This is a high-impact position for an experienced engineer who thrives in a fast-paced, collaborative environment and is eager to push the boundaries of silicon design.

Key Responsibilities

• Partner with architecture teams to define specifications and requirements for next-generation silicon components.
• Architect and implement advanced micro-architectures, ensuring optimal performance, power, and area (PPA).
• Lead the logical design process from concept to tape-out, ensuring high-quality deliverables.
• Coordinate Logical Design (LD) sub-teams, managing dependencies and ensuring projects are well-resourced.
• Actively contribute to design reviews, bringing technical expertise to enhance design quality.

Required Skills & Experience

• 15+ years of experience in silicon logical design, with a strong track record of successful tape-outs.
• Advanced degree in Electrical Engineering, Computer Engineering, or related field.
• Deep expertise in front-end ASIC design, including:
- SystemVerilog advanced coding techniques and best practices
- Linting, synthesis, timing analysis, and physical constraints
- SVA for design, formal property checking
- Understanding of DFT (Design for Testability)
- Development of design flows, best practices, and efficiency guidelines
• Mastery of EDA tools for design and verification.
• Proficiency in scripting languages (Python, TCL) for automation.
• Strong problem-solving, debugging, and analytical skills.

If you have experience of PCIe, UCIe, Ethernet, LPDDR5/6 GDDR7, this would be beneficial, but not essential.

For more information, please get in touch.