Principal Analog Design Engineer

Surf Search Inc; Cascina Vignazza; In loco; EUR 85.000 - 110.000; Tempo pieno

Descrizione del lavoro

A leading technology firm is seeking a Principal Analog Design Engineer in Pavia, Italy. The role involves designing high-speed and optical transceivers, collaborating with engineering teams, and mentoring junior designers. Candidates should have 12-15 years of experience, a Master’s or Ph.D. in Electrical Engineering, and fluency in Italian and English. Competitive salary includes bonuses and paid relocation.

Servizi

Signing bonus

Paid relocation

Performance bonuses

Competenze

• 12-15 years of professional experience in IC design.
• Experience in multi-GHz analog design and custom layout supervision.
• Fluency in Italian and English at a minimum B2 level.

Mansioni

• Design and architect transistor-level designs for analog macros.
• Model and validate circuit blocks and supervise layout activities.
• Collaborate with engineering teams and mentor junior designers.
• Manage pre-silicon and post-silicon tasks related to production.

Conoscenze

Analog design

Lab characterization

Team collaboration

Project management

Communication skills

Formazione

Master’s degree in Electrical Engineering

Ph.D. in Electrical Engineering

Strumenti

EDA CAD tools

Descrizione del lavoro

Principal Analog Design Engineer

Pavia, Italy

€85,000 to €110,000 + Bonus + SIGNING BONUS + Paid Relocation

This role is a key position within our Optical PHY (CE-OPHY) team, which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.

Key Responsibilities

• Design & Architecture: Analyze and interpret block specifications, taking ownership of transistor-level design and selecting the most appropriate topologies. Design entire analog macros or IPs from initial concept to final mass production.
• Verification & Validation: Model and validate circuit blocks. Supervise and guide layout activities, providing clear guidelines and conducting rigorous post-layout verifications to ensure design integrity.
• Collaboration & Leadership: Work closely with other engineering teams to enhance existing solutions and participate in cross-functional meetings. Train and mentor junior designers, building the team’s collective expertise and technical strength.
• Project Management: Manage pre-silicon tasks such as simulation and modeling, and post-silicon tasks including lab characterization, debugging, and correlating measurements to simulations, all the way to high-volume production.

Candidate Profile

• Education & Experience: Master’s degree or Ph.D. in Electrical Engineering or a related field, along with 12-15 years of professional experience.
• Technical Skills: Proven experience in designing ICs from architecture definition phase through to lab characterization and volume production. Solid experience in analog design, preferably in the multi-GHz range. Proficiency in supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements.
• Preferred Qualifications: Experience with multi-Gbps electrical SerDes or electro-optical transceivers is highly desirable. Knowledge of advanced CMOS nodes, including FinFET, would also be a significant advantage.
• Personal Skills: Strong communication, presentation, and documentation skills. Proficiency in both written and spoken Italian and English (at a minimum B2 level) is required.

Work Model

This is an on-site, full-time position located in Pavia, Italy.