Principal Analog Design Engineer

Career Search Associates; Cascina Vignazza; In loco; EUR 85.000 - 110.000; Tempo pieno

Descrizione del lavoro

A leading engineering recruitment firm is seeking a Principal Analog Design Engineer in Pavia, Italy. This position involves designing high-speed and optical transceivers for modern communication infrastructure. Candidates should have a Master's degree or Ph.D. in Electrical Engineering and 12-15 years of experience. Strong proficiency in analog design and bilingual in Italian and English is required for the role in an international team.

Servizi

€85,000 to €110,000 salary

Signing bonus

Paid relocation

Competenze

• 12-15 years of professional experience required.
• Proven experience designing ICs from architecture definition through lab characterization.
• Proficiency in Italian and English (minimum B2) due to an international team.

Mansioni

• Analyze and interpret block specifications and perform transistor-level design.
• Model and validate circuit blocks; supervise layout activities.
• Work closely with other engineering teams to enhance existing solutions.
• Manage pre-silicon and post-silicon tasks through to high-volume production.

Conoscenze

Analog design

IC design

Collaboration

Project management

Communication skills

Formazione

Master's degree or Ph.D. in Electrical Engineering

Strumenti

EDA CAD tools

Descrizione del lavoro

Overview

Principal Analog Design Engineer

Pavia, Italy

€85,000 to €110,000 + Bonus + SIGNING BONUS + Paid Relocation

This role is a key position within our Optical PHY (CE-OPHY) team, which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.

Responsibilities

• Design & Architecture: analyze and interpret block specifications, take ownership of transistor-level design, and select the most appropriate topologies. Design entire analog macros or IPs from initial concept to final mass production.
• Verification & Validation: model and validate circuit blocks; supervise layout activities, provide clear guidelines, and conduct rigorous post-layout verifications to ensure design integrity.
• Collaboration & Leadership: work closely with other engineering teams to enhance existing solutions; participate in cross-functional meetings; train and mentor junior designers to build the team's expertise.
• Project Management: manage pre-silicon tasks (simulation and modeling) and post-silicon tasks (lab characterization, debugging, correlating measurements to simulations) through to high-volume production.

Candidate Profile

• Education & Experience: A Master's degree or Ph.D. in Electrical Engineering or a related field is required, with 12-15 years of professional experience.
• Technical Skills: proven experience designing ICs from architecture definition through lab characterization and volume production; strong background in analog design (preferably multi-GHz); experience supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements.
• Preferred Qualifications: Experience with multi-Gbps electrical SerDes or electro-optical transceivers; knowledge of advanced CMOS nodes, including FinFET, is advantageous.
• Personal Skills: strong communication, presentation, and documentation skills; proficiency in Italian and English (minimum B2) due to an international team and location.
• Work Model: On-site, full-time position located in Pavia, Italy.