MEMS Analog Mixed Signal Verification

STMicroelectronics; Cornaredo; On-site; EUR 45,000 - 65,000; Full time

Job summary

STMicroelectronics in Italy is seeking a Mixed Signal verification engineer with 3 to 5 years of experience in analog and mixed-signal ASIC verification. You will contribute to the MEMS sGROUP verification efforts across ASIC levels, from specs to final product validation.

The role emphasizes development of verification test benches and components, using SystemVerilog and Verilog-AMS, with opportunities to work on cutting-edge SoC verification methodologies and cross-functional collaboration.

Qualifications

• The ideal candidate has strong knowledge of analog custom circuits (ADC, DAC, comparators) and mixed-signal verification.
• Experience with SystemVerilog, Verilog-AMS and analog/digital/mixed-signal simulation environments.
• Proficient in bug analysis, reporting and testbench development; Python is a plus.

Responsibilities

• Define and develop verification test benches and components for ASIC verification.
• Create test cases for simulation and debug failures across studies.
• Work with cutting-edge verification methodologies at subsystem and SoC levels.

Skills

Analog design knowledge

SystemVerilog

Verilog-AMS

Mixed-signal verification

Python scripting

Bug analysis

Team collaboration

Tools

SystemVerilog RNM

Verilog-AMS

Analog/Digital simulators

Job description

OUR STORY

At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.

When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.

Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential.

Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.

YOUR ROLE

The position is aimed at Mixed Signal verification engineer with previous experience in analog on top mixed and digital simulations of ASIC. The preferred seniority is 3 to 5 years of experience.

The candidate will be part of Mixed verification team of MEMS sGROUP and he/she/div will have the opportunity to follow all the ASIC verification process from specification definition up to final product industrialization.

The candidate responsibilities includes definition and development of verification test bench, development of verification components, test case development for simulation, debugging failures and creating simulation cases for various studies. As an experienced professional, work with the cutting-edge verification methodologies on Subsystem level and SoC level.

YOUR SKILLS & EXPERIENCES

The ideal candidate has a good knowledge of Analog custom circuit (e.g., ADC, DAC, comparators, ...), Modeling languages such as System Verilog RNM, Verilog-AMS, Analog Model definition and implementation, Analog Model verification and validation, Analog, digital and mixed-signal simulation environments and tools, Bugs analysis and reporting.

Basic knowledge of Coverage, Digital logic gates, Scripting languages like python is a plus.

The candidate has also soft skills such as good communication, fluently in English, team working and collaboration across all the entire MEMS sGROUP Design team.

ST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction. ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.

At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination. We aim to recruit and retain a diverse workforce that reflects the societies around us. We strive for equity in career development, career opportunities, and equal remuneration. We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning. Diversity, equity, and inclusion (DEI) is woven into our company culture.