FPGA/ASIC Design Engineer — HDL & Verification

Avaneidi; Lombardia; On-site; EUR 70,000 - 90,000; Full time

Job summary

Avaneidi in Lombardia is seeking an FPGA/ASIC Hardware Engineer to design, simulate, and verify digital circuits for high-performance FPGA and ASIC solutions. You will work with software teams to integrate hardware blocks into products.

Candidates should have HDL experience, strong timing analysis, and hands-on with Vivado/Quartus. The role emphasizes fast-paced collaboration and rigorous verification using testbenches and UVM.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• Proven experience with FPGA/ASIC design and implementation using HDL (VHDL, Verilog, or SystemVerilog).
• Experience with FPGA development tools such as Xilinx Vivado, Intel Quartus, or similar.
• Strong understanding of digital circuits, state machines, and timing analysis.
• Familiarity with simulation and verification methodologies (e.g., UVM, constrained-random verification).
• Experience with Embedded systems, microcontrollers, and hardware/software co-design.
• Knowledge of PCIe, Ethernet, memory interfaces, and other high-speed interfaces is a plus.
• Experience with testbenches and verification environments.
• Strong problem-solving skills and the ability to work in a fast-paced, collaborative environment.
• Familiarity with version control systems (Git).

Responsibilities

• Design, develop, and verify FPGA and ASIC hardware solutions.
• Create and optimize HDL designs using VHDL, Verilog, or SystemVerilog.
• Develop testbenches and perform functional verification of FPGA/ASIC designs.
• Conduct timing analysis and ensure the implementation meets the required specifications.
• Work with simulation tools (e.g., ModelSim, Questa) for design validation and debugging.
• Collaborate with software engineers to integrate FPGA/ASIC designs with embedded software.
• Perform hardware/software co-design to ensure efficient system performance.
• Work with FPGA development boards and tools (Xilinx Vivado, Intel Quartus) for design implementation.
• Document design processes, test results, and any design trade-offs or optimizations.
• Stay up-to-date with the latest developments in FPGA/ASIC design, tools, and methodologies.

Skills

FPGA/ASIC design

HDL (VHDL/Verilog/SystemVerilog)

Digital design

Timing analysis

ModelSim/Questa

Embedded systems

Git version control

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Xilinx Vivado

Intel Quartus

ModelSim/Questa

Job description

Avaneidi in Lombardia is seeking an FPGA/ASIC Hardware Engineer to design, simulate, and verify digital circuits for high-performance FPGA and ASIC solutions. You will work with software teams to integrate hardware blocks into products.

Candidates should have HDL experience, strong timing analysis, and hands-on with Vivado/Quartus. The role emphasizes fast-paced collaboration and rigorous verification using testbenches and UVM.