Senior Analog Ic Design Engineer

Buscojobs; Campania; Remoto; EUR 50.000 - 90.000; Tempo pieno

Descrizione del lavoro

An innovative technology company is seeking a Senior Analog IC Design Engineer to lead the development of high-speed Phase Locked Loops and integrated power management solutions. This role offers a unique opportunity to work on cutting-edge technologies that enhance energy efficiency in data communication. The ideal candidate will have a strong background in CMOS analog design, with proficiency in industry-standard tools. Join a collaborative team that values innovation and creativity, and contribute to the future of high-performance data solutions. Remote work may be considered for the right candidate, although preference is given to those based in Italy.

Competenze

• Proven track record in PLL and power management design.
• Strong background in CMOS analog design fundamentals.

Mansioni

• Design and develop high-speed PLLs (10 GHz and above).
• Collaborate closely with digital and systems teams on mixed signal integration.

Conoscenze

PLL Design

Power Management Design

CMOS Analog Design

Problem Solving

Strumenti

Cadence

Spectre

Descrizione del lavoro

I am recruiting for a Senior Analog IC Design Engineer on behalf of my client, a growing technology company developing next-generation solutions for high-performance data communication. The position is focused on high-speed Phase Locked Loop design and integrated power management within advanced CMOS nodes.

The Senior Analog IC Design Engineer will contribute to cutting-edge developments in energy-efficient interconnects.

Key responsibilities : Design and develop high-speed PLLs (10 GHz and above)Implement on-chip power management circuits such as LDOs and DACsCollaborate closely with digital, systems and photonic teams on complex mixed signal integrationRun simulations, oversee layout and verify performance of analog building blocksBring industry trends and design innovations into the development cycle

Required experience : Proven track record in PLL and power management design, ideally at or near 12nm nodesStrong background in CMOS analog design fundamentalsProficient with tools like Cadence and SpectreDetail oriented with excellent problem solving skills

To be considered for this opportunity, you will need to have experience in high-speed designs.

This is an excellent opportunity for a Senior Analog IC Design Engineer looking to work on novel technologies in a collaborative and forward-looking environment.

Remote working may be possible for the right candidate, although Italy is preferred.