Design Verification Lead

Sperton Global AS; Italia; Remoto; EUR 30.000 - 50.000; Tempo pieno

Descrizione del lavoro

A leading global consulting firm is looking for experienced DV Leads for a major semiconductor verification project. This remote contract allows EU-based engineers to work from any EU location, while candidates outside the EU must relocate to the Netherlands. The ideal candidate will have over 10 years of SoC / IP DV experience and strong leadership skills. Competitive rate of €55–€60 per hour is offered, with visa sponsorship available for non-EU applicants.

Competenze

• 10+ years of hands-on SoC / IP DV experience.
• 2+ years of team leadership or technical delivery ownership.
• Strong communicator and problem-solver.

Mansioni

• Lead SoC / IP Design Verification planning and execution.
• Build and enhance testbenches using SystemVerilog and UVM.
• Oversee debugging, test development, and coverage closure.
• Mentor and guide junior engineers across offshore and onsite teams.
• Manage quality assurance across version control and simulation flows.

Conoscenze

SoC / IP Design Verification

SystemVerilog

UVM

Team leadership

Problem-solving

Descrizione del lavoro

Overview

About the Role

We’re hiring experienced DV Leads to join a major semiconductor verification initiative for a European client. You’ll be responsible for leading SoC / IP verification efforts across global teams, while working on cutting-edge technologies including ARM-based architectures, CHI protocols, and high-speed interfaces like PCIe and DDR.

Location

EU-Based Candidates: Fully Remote (within EU)

Non-EU Candidates: Remote from the Netherlands (Relocation Required)

Duration

12-month Contract

Rate

€55–€60 / hour (all-inclusive)

Visa Sponsorship

Available for non-EU candidates

Openings

Multiple

Exclusive Assignment: Exclusive engagement with a top-tier European semiconductor program through a trusted consulting partner

This is a remote contract position

• Candidates already in the EU can work from any EU location.
• Relocation to the Netherlands is supported (and required) for candidates applying from outside the EU.

Key Responsibilities

• Lead SoC / IP Design Verification planning and execution
• Build and enhance testbenches using SystemVerilog and UVM
• Oversee debugging, test development, and coverage closure
• Mentor and guide junior engineers across offshore and onsite teams
• Work on complex interfaces like PCIe or DDR within ARM / CHI-based SoC environments
• Coordinate cross-functional deliverables with global stakeholders
• Manage quality assurance across version control and simulation flows

Ideal Candidate

• 10+ years of hands-on SoC / IP DV experience
• 2+ years of team leadership or technical delivery ownership
• Strong communicator and problem-solver
• Open to relocation (if outside EU) or already residing within EU

Who Can Apply

EU-Based Engineers: Work remotely from anywhere within the EU

Global Applicants (India, Sri Lanka, Singapore, USA, etc.): Must be open to relocate to the Netherlands (visa sponsorship provided)